ATSAMA5D41A-CU View Datasheet(PDF) - Atmel Corporation
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MFG CO.
'ATSAMA5D41A-CU' PDF : 1808 Pages View PDF
Table 15-4.
4
5
6
List of H32MX Masters (Continued)
UDPHS DMA
GMAC0 DMA
GMAC1 DMA
15.4.2 Matrix Slaves
The H32MX manages seven slaves. Each slave has its own arbitrator providing a dedicated arbitration per slave.
Table 15-5. List of H32MX Slaves
Slave No. Description
TZ Access Management
0
Bridge from H32MX to H64MX
–
1
H32MX Peripheral Bridge 0
–
2
H32MX Peripheral Bridge 1
–
3
External Bus Interface
External Secure
3
NFC command register
Programmable Secure(1)
4
NFC SRAM
Programmable Secure(1)
USB Device High Speed Dual Port RAM (DPR)
5
USB Host OHCI registers
Programmable Secure(1)
USB Host EHCI registers
6
Soft Modem (SMD)
Programmable Secure(1)
Notes: 1. These AHB slaves are programmed like APB slaves in the MATRIX_SPSELRx.
15.4.3 Master to Slave Access
Table 15-6 gives the interconnect between all the masters and slaves. Writing in a register or field not dedicated to a mas-
ter or a slave will have no effect.
Table 15-6. Master to Slave Access on H32MX
0 (through Bridge from H64MX)
XDMAC0
XDMAC1
Slave
Core IF0 IF1 IF0 IF1
0
Bridge from H32MX
to H64MX
1
H32MX APB0 - user
interfaces
X
X
X
2
H32MX APB1 - user
interfaces
X
X
X
EBI CS0..CS3
X
X
X
3 NFC Command
Register
X
X
X
4 NFC SRAM
X
X
X
Master
1
2
UHPHS
EHCI
ICM
DMA
3
UHPHS
OHCI
DMA
4
UDPHS
DMA
5
GMAC
0 DMA
6
GMAC
1 DMA
X
X
X
X
X
X
X
X
X
SAMA5D4 Series [DATASHEET]
Atmel-11238C-ATARM-SAMA5D4-Datasheet_12-Jul-16
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