Table 9-4. CP15 Registers (Continued)
Register
5
Name
Data fault Status(1)
Read/Write
Read/Write
5
Instruction fault status
Read/Write
6
Fault Address
7
Cache and MMU Operations(1)
Read/Write
Read/Write
8
TLB operations
9
Cache lockdown(1)
Unpredictable/Write
Read/Write
10
TLB lockdown
Read/Write
11
Reserved
None
12
Interrupts management
Read/Write
12
Monitor vectors
13
FCSE PID(1)
13
Context ID(1)
Read-only
Read/Write
Read/Write
14
Reserved
None
Note:
15
Test configuration
Read/Write
1. This register provides access to more than one register. The register accessed depends on the value of the CRm
field or Opcode_2 field.
48 SAMA5D4 Series [DATASHEET]
Atmel-11238C-ATARM-SAMA5D4-Datasheet_12-Jul-16