CL-PD6833
PCI-to-CardBus Host Adapter
11.8.5 SMBus Socket Power Control Address — PME_CXT
Register Name: SMBus Socket Power Control Address — PME_CXT
I/O Index: 2Fh Extended Index: 26h
Memory Offset: 926h
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Register Per: chip
Register Compatibility Type: ext.
Bit 2
Bit 1
Bit 0
A6
A5
A4
A3
A2
A1
Reserved
R/W:1
R/W:0
R/W:1
R/W:0
R/W:0
R/W:0
R/W:00
NOTE: PME_CXT (PME Context) is a set of register bits that do not get reset or initialized if PME Enable is true
when the CL-PD6833 changes power states from D3 to D0 through a software PCI Bus Segment reset.
Bits 1:0 — Reserved
Bits 7:2 — SMBus Socket Power Control Address A[6:1]
This register contains the most-significant six bits of the SMBus (system management bus) slave
address for the socket power-control device. The SMBus specification for the slave address for a
PC Card socket power control device is 101000XX. This register resets to ‘101000’ for bits 7:2,
and the socket power control device can be hard configured to this address to eliminate additional
software setup. The CL-PD6833 supports the MAX1601, which is a dual-socket power control chip
employing the SMBus protocol (see also the register Misc Control 3 on page151).
June 1998
ADVANCE DATA BOOK v0.3
EXTENSION REGISTERS
153