CL-PD6833-VC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-VC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
11.8.7 Gen Map 0–6 Extra Control (Memory)
When the Window Type Select register bit corresponding to a general map register is set (and that window
is configured in PC Card space control as Memory), this register is used to program the Memory behavior
to the PC Card socket. When the Window Type Select register bit is reset, this register is ignored. When
the Window Type Select register bit is set and the PC Card Space Control register bit is set to ‘0’ (indi-
cating memory operation), this register is configured as follows.
Register Name: Gen Map 0–6 Extra Control (Memory)
I/O Index: 2Fh Extended Index: 27h–2Dh
Memory Offset: 927h–92Dh
Bit 7
Bit 6
Bit 5
Bit 4
Reserved
R:0000
Register Per: socket
Register Compatibility Type: ext.
Bit 3
Bit 2
Extra
Card Timer Select
R/W:00
Bit 1
Reserved
R/W:0
Bit 0
Extra
Window Data
Size
R/W:0
Bit 0 — Extra Window Data Size
0
8-bit data path to PC Card.
1
16-bit data path to PC Card.
Bit 1 — Reserved
Bits 3:2 — Extra Card Timer Select
Bit 3
0
0
1
1
Bit 2
0
1
0
1
Selects Timer Set 0
Selects Timer Set 1
Selects Timer Set 1
Selects Timer Set 1
Timer Set Select
This field selects the timer set. Timer Set 0 and 1 reset to values compatible with standard PCI
and three-wait-state cycles.
Bits 7:4 — Reserved
June 1998
ADVANCE DATA BOOK v0.3
EXTENSION REGISTERS
155
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