CL-PD6833-VC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-VC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
11.9 Device Identification and Implementation Scheme
There are four-byte-wide registers with read-only device information, and four-byte-wide read/write regis-
ters that contain specific system implementation information.
Determining This Register Exists
If bits 4:1 of the Chip Information register (memory offset 81Fh) read back ‘0h’, the chip information is
contained in bits 3:0 of the Mask Revision register (memory offset 934h).
11.9.1 Mask Revision Byte
Register Name: Mask Revision Byte
I/O Index: 34h
Memory Offset: 934h
Register Per: chip
Register Compatibility Type: ext.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RFU
Mask Revision
R:0
R:0
R:0
R:0
R:0
R:0
R:0
R:0
Bits 3:0 — Mask Revision
These bits indicate the mask revision of the device. The binary value is interpreted as in the
following table:
Bits 3:0
0h
1h
2h
3h
4h
5h
6h
7h
8h
9h
Ah
Bh
Ch
Dh
Eh
Fh
Mask Revision
A
B
C
D
E
F
G
H
J
K
L
M
N
P
Q
R
Bits 7:4 — RFU (reserved for future use)
June 1998
ADVANCE DATA BOOK v0.3
EXTENSION REGISTERS
159
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