DSM2180F3 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
DSM2180F3
STMicroelectronics
'DSM2180F3' PDF : 63 Pages View PDF
DSM2180F3
Figure 11. Data Toggle Flowchart
START
set to the Read Flash memory status. The Bulk
Erase command may be addresses to any one in-
dividual valid Flash memory segment (FS0-FS7)
and the entire array (all segments) will be erased.
During a Bulk Erase, the memory status may be
READ
DQ5 & DQ6
checked by reading the Error Flag (DQ5) bit, the
Toggle Flag (DQ6) bit, and the Data Polling Flag
(DQ7) bit, as detailed in the section entitled “Pro-
DQ= 6
NO
TOGGLE
gramming Flash Memory”, on page 21. The Error
Flag (DQ5) bit returns a 1 if there has been an
Erase Failure (maximum number of Erase cycles
YES
have been executed).
It is not necessary to program the memory with
NO DQ5
=1
00h because the device automatically does this
before erasing to 0FFh.
During execution of the Bulk Erase instruction se-
YES
quence, the Flash memory does not accept any in-
READ DQ6
struction sequences.
t(s) DQ= 6
NO
TOGGLE
uc YES
rod FAIL
PASS
P AI01370B
lete The Error Flag (DQ5) bit is set if either an internal
time-out occurred while the embedded algorithm
so attempted to program the byte, or if the DSP at-
b tempted to program a 1 to a bit that was not erased
O (not erased is logic 0).
- It is suggested (as with all Flash memories) to read
) the location again after the embedded program-
t(s ming algorithm has completed, to compare the
byte that was written to Flash memory with the
c byte that was intended to be written.
du When using the Data Toggle method after an
ro Erase cycle, Figure 11 still applies. the Toggle
Flag (DQ6) bit toggles until the Erase cycle is com-
P plete. A 1 on the Error Flag (DQ5) bit indicates a
te time-out condition on the Erase cycle, a 0 indi-
cates no error. The DSP can read any location
le within the sector being erased to get the Toggle
o Flag (DQ6) bit and the Error Flag (DQ5) bit.
bs PSDsoft Express generates ANSI C code func-
Otions which implement these Data Toggling algo-
The address provided with the Flash Bulk Erase
command sequence (Table 5) may select any one
of the eight internal Flash memory Sector Select
signals (FS0 - FS7). An erase of the entire Flash
memory array will occur even though the com-
mand was sent to just one Flash memory sector.
Flash Sector Erase. The Sector Erase instruc-
tion sequence uses six write operations, as de-
scribed in Table 5. Additional Flash Sector Erase
codes and Flash memory sector addresses can be
written subsequently to erase other Flash memory
sectors in parallel, without further coded cycles, if
the additional bytes are transmitted in a shorter
time than the time-out period of about 100 µs. The
input of a new Sector Erase code restarts the time-
out period.
The status of the internal timer can be monitored
through the level of the Erase Time-out Flag (DQ3)
bit. If the Erase Time-out Flag (DQ3) bit is 0, the
Sector Erase instruction sequence has been re-
ceived and the time-out period is counting. If the
Erase Time-out Flag (DQ3) bit is 1, the time-out
period has expired and the device is busy erasing
the Flash memory sector(s). Before and during
Erase time-out, any instruction sequence other
than Suspend Sector Erase and Resume Sector
Erase instruction sequences abort the cycle that is
currently in progress, and reset the device to Read
Array mode. It is not necessary to program the
Flash memory sector with 00h as the device does
this automatically before erasing (byte=FFh).
rithms.
During a Sector Erase, the memory status may be
Erasing Flash Memory
checked by reading the Error Flag (DQ5) bit, the
Flash Bulk Erase. The Flash Bulk Erase instruc-
tion sequence uses six write operations followed
by a read operation of the status register, as de-
Toggle Flag (DQ6) bit, and the Data Polling Flag
(DQ7) bit, as detailed in the section entitled “Pro-
gramming Flash Memory”, on page 21.
scribed in Table 5. If any byte of the Bulk Erase in- During execution of the Erase cycle, the Flash
struction sequence is wrong, the Bulk Erase memory accepts only Reset and Suspend Sector
instruction sequence aborts and the device is re- Erase instruction sequences. Erasure of one
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