DSM2180F3 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
DSM2180F3
STMicroelectronics
'DSM2180F3' PDF : 63 Pages View PDF
DSM2180F3
The DPLD performs address decoding, and gen-
erates select signals for internal and external com-
ponents, such as memory, registers, and I/O ports.
The DPLD can generates External Chip Select
(ECS0-ECS2) signals on Port D.
The CPLD can be used for logic functions, such as
loadable counters and shift registers, state ma-
chines, and encoding and decoding logic. These
logic functions can be constructed using the 16
Output Macrocells (OMC), 16 Input Macrocells
(IMC), and the AND Array.
The AND Array is used to form product terms.
These product terms are configured from the logic
definition entered in PSDsoft Express. An Input
Bus consisting of 64 signals is connected to the
PLDs. Input signals are shown in Table 9.
Turbo Bit. The PLDs in the device can minimize
power consumption by switching off when inputs
remain unchanged for an extended time of about
70 ns. Resetting the Turbo bit to 0 (Bit 3 of the
PMMR0 register) automatically places the PLDs
into standby if no inputs are changing. Turning the
Turbo mode off increases propagation delays
while reducing power consumption. Additionally,
five bits are available in the PMMR registers in
csiop to block DSP control signals from entering
the PLDs. This reduces power consumption and
can be used only when these DSP control signals
are not used in PLD logic equations. Each of the
two PLDs has unique characteristics suited for its
applications. They are described in the following
sections.
Figure 13. PLD Diagram
t(s) 8
PAGE
c REGISTER
u Data
d Bus
ro 8
DECODE PLD
P 64
(DPLD)
Flash Memory Selects
lete 1
o CSIOP Select
s 3
bExternal Chip Selects to PORT D
1
OJTAG Select
t(s) - 16
Output Macrocell Feedback
Direct Macrocell Access from MCU Data Bus
uc CPLD
16 Output
MCELLAB
d Macrocell
Macrocell
to PORT B 8
ro PT
Alloc.
64
ALLOC.
MCELLBC
P 16 Input Macrocell
to PORT B or C 8
te (PORT B,C)
Obsole Direct Macrocell Input to MCU Data Bus
16
Input Macrocell and Input Ports
3
PORT D Inputs
AI04900B
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