LRS1338A View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'LRS1338A' PDF : 36 Pages View PDF
Stacked Chip (8M Flash & 2M SRAM)
LRS1338A
Start
Write 20H
Block Address
Write D0H
Block Address
Read
Status Register
SR.7 = 0
1
Full Status
Check If Desired
Block Erase
Complete
Suspend Block
No Erase Loop
Suspend Yes
Block
Erase
BUS
OPERATION
COMMAND
COMMENTS
Write
Erase Setup
Data = 20H
Addr = Within Block to be Erased
Write
Erase Data = D0H
Confirm Addr = Within Block to be Erased
Read
Status Register Data
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
Repeat for subsequent block erasures.
Full status check can be done after each block erase
or after a sequence of block erasures.
Write FFH after the last operation to place device in read array mode.
FULL STATUS CHECK PROCEDURE
Read Status Register
Data (See Above)
1
SR.3 =
0
VPP
Range Error
1
SR.1 =
0
Device
Protect Error
1
SR.4, 5 =
0
Command
Sequence Error
BUS
OPERATION
COMMAND
COMMENTS
Standby
Standby
Check SR.3
1 = VPP Error Detect
Check SR.1
1 = Device Protect Detect
Standby
Check SR.4, 5
Both 1 = Command Sequence Error
Standby
Check SR.5
1 = Block Erase Error
SR.5, SR.4, SR.3, and SR.1 are only cleared by the Clear Status
Register Command in cases where multiple blocks are erased before
full status is checked.
If error is detected, clear the Status Register before attempting
retry or other error recovery.
1
SR.5 =
0
Block Erase
Successful
Block
Erase Error
Figure 6. Automated Block Erase Flowchart
LRS1338A-6
Data Sheet
13
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