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LRS1338A View Datasheet(PDF) - Sharp Electronics

Part Name
Description
MFG CO.
LRS1338A
Sharp
Sharp Electronics Sharp
'LRS1338A' PDF : 36 Pages View PDF
LRS1338A
Stacked Chip (8M Flash & 2M SRAM)
Electrical Specifications
ABSOLUTE MAXIMUM RATINGS*
Commercial Operating Temperature
During Read, Block Erase and Word Write:
-40°C to +85°C (Note 1)
Temperature under Bias: -40°C to +85°C (Note 1)
Storage Temperature: -65°C to +125°C
Voltage on any pin except VCC, VPP and RP:
-2.0 V to +7.0 V (Note 2)
VCC Supply Voltage: -2.0 V to +7.0 V (Note 2)
VPP Update Voltage during Block Erase and Word
Write: -2.0 V to +14.0 V (Note 2 and 3)
RP Voltage: -2.0 V to +14.0 V (Note 2 and 3)
Output Short Circuit Current: 100 mA (Note 4)
WARNING: *Stressing the device beyond the Absolute Maximum
Ratingsmay cause permanent damage. These are stress ratings
only. Operation beyond the Operating Conditionsis not recom-
mended and extended exposure beyond the Operating Conditions
may affect device reliability.
NOTES:
1. Operating temperature is for commercial product defined by this
specification.
2. All specified voltages are with respect to GND. Minimum DC volt-
age is -0.5 V on input/output pins and -0.2 V on VCC and VPP pins.
During transitions, this level may undershoot to -2.0 V for periods
< 20 ns. Maximum DC voltage on input/output pins and VCC is VCC
+ 0.5 V which, during transitions, may overshoot to VCC + 2.0 V for
periods < 20 ns.
3. Maximum DC voltage on VPP and RP may overshoot to +14.0 V
for periods <20 ns.
4. Output shorted for no more than one second. No more than one
output shorted at a time.
AC Test Conditions
2.7
INPUT 1.35
0.0
TEST POINTS
1.35 OUTPUT
NOTE: AC test inputs are driven at 2.7 V for a Logic '1' and 0.0 V
for a Logic '0'. Input timing begins and output timing ends
at 1.35 V. Input rise and fall times (10% to 90%) < 10 ns.
LRS1338A-10
Figure 10. Transient Input/Output Reference
Waveform for VCC = 2.7 V to 3.6 V
DEVICE
UNDER
TEST
1.3 V
1N914
RL = 3.3 k
OUT
CL
NOTE: CL Includes Jig Capacitance
LRS1338A-11
Figure 11. Transient Equivalent
Testing Load Circuit
Table 10. Test Configuration
Capacitance Loading Value
TEST CONFIGURATION
VCC = 2.7 V to 3.6 V
CL (pF)
50
20
Data Sheet
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