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MT48V4M32LFFF-10 View Datasheet(PDF) - Micron Technology

Part Name
Description
MFG CO.
MT48V4M32LFFF-10
Micron
Micron Technology Micron
'MT48V4M32LFFF-10' PDF : 61 Pages View PDF
CLOCK SUSPEND MODE1
T0
CLK
T1
T2
T3
tCK
tCL
tCH
tCKS tCKH
CKE
tCKS tCKH
tCMS tCMH
COMMAND
READ
NOP
NOP
T4
T5
NOP
NOP
DQMU, DQML
A0-A9, A11
tAS tAH
COLUMN m2
tCMS tCMH
A10
BA0, BA1
tAS tAH
tAS tAH
BANK
tAC
tAC
tOH
tHZ
DQ
tLZ
DOUT m
DOUT m + 1
T6
NOP
ADVANCE
128Mb: x16, x32
MOBILE SDRAM
T7
T8
T9
WRITE
COLUMN e2
BANK
tDS tDH
DOUT e
NOP
DOUT e + 1
DON’T CARE
UNDEFINED
TIMING PARAMETERS
SYMBOL*
tAC (3)
tAC (2)
tAC (1)
tAH
tAS
tCH
tCL
tCK (3)
tCK (2)
tCK (1)
-8
MIN MAX
7
8
19
1
2.5
3
3
8
10
20
-10
MIN MAX
7
8
22
1
2.5
3
3
10
12
25
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
*CAS latency indicated in parentheses.
SYMBOL*
tCKH
tCKS
tCMH
tCMS
tDH
tDS
tHZ (3)
tHZ (2)
tHZ (1)
tLZ
tOH
-8
MIN MAX
1
2.5
1
2.5
1
2.5
7
8
19
1
2.5
-10
MIN MAX
1
2.5
1
2.5
1
2.5
7
8
22
1
2.5
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTE: 1. For this example, the burst length = 2, the CAS latency = 3, and auto precharge is disabled.
2. x16: A9 and A11 = “Don’t Care”
x32: A8, A9 and A11 = “Don’t Care”
128Mb: x16, x32 Mobile SDRAM
MobileY95W_3V_F.p65 – Rev. F; Pub. 9/02
42
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.
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