MT48V4M32LFFF-10 View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48V4M32LFFF-10' PDF : 61 Pages View PDF
T0
CLK
tCK
CKE
tCKS tCKH
tCMS tCMH
COMMAND
PRECHARGE
T1
NOP
DQMU, DQML
A0-A9, A11
ALL BANKS
A10
SINGLE BANK
tAS tAH
BA0, BA1
BANK(S)
DQ High-Z
tRP
Precharge all
active banks
AUTO REFRESH MODE
T2
((
))
tCH
((
))
((
))
Tn + 1
tCL
ADVANCE
128Mb: x16, x32
MOBILE SDRAM
To + 1
((
))
((
))
((
))
AUTO
REFRESH
((
))
NOP( ( NOP
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
tRFC1
AUTO
REFRESH
((
))
NOP( ( NOP
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
tRFC1
ACTIVE
ROW
ROW
BANK
DON’T CARE
TIMING PARAMETERS
SYMBOL*
tAH
tAS
tCH
tCL
tCK (3)
tCK (2)
-8
MIN MAX
1
2.5
3
3
8
10
-10
MIN MAX
1
2.5
3
3
10
12
UNITS
ns
ns
ns
ns
ns
ns
*CAS latency indicated in parentheses.
SYMBOL*
tCK (1)
tCKH
tCKS
tCMH
tCMS
tRFC
tRP
-8
MIN MAX
20
1
2.5
1
2.5
80
20
-10
MIN MAX
25
1
2.5
1
2.5
100
20
UNITS
ns
ns
ns
ns
ns
ns
ns
NOTE: 1. Each AUTO REFRESH command performs a refresh cycle. Back-to-back commands are not required.
128Mb: x16, x32 Mobile SDRAM
MobileY95W_3V_F.p65 – Rev. F; Pub. 9/02
43
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.
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