SAA7392HLM2B View Datasheet(PDF) - Philips Electronics
Part Name
Description
MFG CO.
'SAA7392HLM2B' PDF : 76 Pages View PDF
Philips Semiconductors
Channel encoder/decoder CDR60
Preliminary specification
SAA7392
9.1 ADC and AGC parameters
Table 156 ADC parameters
PARAMETER
Resolution
Data format
Maximum sample
frequency
SINAD
DNL
INL
Power dissipation
Input range
Voltage reference
Bias current
Bandwidth
Clock frequency
Clock duty cycle
Clock jitter
VALUE
8-bit
Simple Binary
70 MS/s
>26 dB
−1.0/+1.0 LSB
−2.0/+2.0 LSB
<100 mW
1.47 − 2.91 V
2.9 V
100 µA
35 MHz
70 MHz
40 to 60%
±200 ps
COMMENTS
nominal rate 50 MS/s
17.5 MHz signal − 12 dB down on ADC full scale, 70 MS/s sample rate
70 MS/s; 1 MHz input
70 MS/s; 1 MHz input
top ladder reference
provided externally
−3 dB (−0.5 effective bits)
defines sample rate
for 6.5-bit accuracy, f = 17.5 MHz
Table 157 AGC parameters
PARAMETER
Output level
Gain range
Gain step
Bandwidth
Phase linearity
Resolution
SNR
THD
Input range
Input impedance
Offset voltage
VALUE
COMMENTS
1.4 V(p-p)
−2.69 to +11.25 dB approx. linear in dBs
1.1 dB
35 MHz
0.6 ns
−3 dB point
in bandwidth of 35 MHz
5-bit
50 dB
<−35 dB
0.39 to 1.96 V
in bandwidth of 35 MHz
f = 17.5 MHz; Vout(p-p) = 1.44 V; ADC load
peak-to-peak value
7.57 kΩ
<30 mV
nominal, at HIN
2000 Mar 21
67
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