SAA7392HLM2B View Datasheet(PDF) - Philips Electronics
Part Name
Description
MFG CO.
'SAA7392HLM2B' PDF : 76 Pages View PDF
Philips Semiconductors
Channel encoder/decoder CDR60
Preliminary specification
SAA7392
7. When the correct start address is found on the disc,
the LaserOn and WriteOn2 signals are switched on at
the same time. As a result data flow in the encoder
starts while data is written to the disc.
10.4 Start-up of encoder in synchronous stream
mode
In synchronous stream mode operation is different
because the serial input stream cannot be gated off.
1. Reset the encoder. Switch LaserOn off, Switch
WriteOn2 off and switch encoder to ‘flush’ mode.
2. Preset the device.
a) Preset the serial input format
b) Preset the subcode insertion block
c) Preset the EFM modulator block
d) Preset the EFM clock generator. The EFM clock
generator must be programmed to slave to the
incoming serial stream.
3. Let the disc run at the required speed. Make the motor
servo slave to the W441 wobble clock.
4. Switch on WriteOn2. This signal must be switched on
to allow data to leave the encoder when it enters it.
(Important to avoid overflow.)
5. At this stage everything is initialized. The input stream
is running but does not enter the encoder because it is
still in the ‘reset’ state. The output stream is running
too at the same speed as the input speed because the
EFM clock generator is setup like this.
6. The encoder is switched from ‘flush’ to ‘encode play’
mode. At this point the data stream starts. Data from
the serial in interface enters the encoder while data is
read out from it at approximately the same speed via
the EFM modulator. The FIFO will not overflow. The
data is discarded and not written to the disc because
LaserOn is still switch off.
7. When the correct start address is found on the disc
LaserOn is switched on allowing data stream to the
disc.
10.5 Operating CDR60 in CAV mode, flow control on
input stream
For very high-speed operation it is possible to lock the
EFM clock to the ATIP wobble carrier. To do this W441
must be selected as the clock source while the position
error is taken from XError. The XError signal gives the time
difference between the ATIPSync and the QSync.
Programming the EFM clock generator like this with a
multiplication factor of 98 will produce an EFM clock that is
synchronous with the ATIP carrier. It can be used to write
data in lock-to-disc mode.
10.6 Operating in CLV Mode, Flow Control on Input
Stream
Simply bypass the EFM PLL and use the system clock as
EFM source.
10.7 Operating in CLV Mode, Synchronous Stream
Operation
When an audio stream is input to the CDR60 encoder the
EFM clock must lock to the serial input WCLK clock signal.
The position error is taken from the FIFOFill signal. This
will produce an EFM clock that is 98 times the WCLK
frequency.
2000 Mar 21
69
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