ST7FLU05MCE View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST7FLU05MCE

8-bit low cost, low pin-count MCU for automotive, with single voltage Flash memory, ADC, timers

STMicroelectronics 

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On-chip peripherals

ST7LUS5, ST7LU05, ST7LU09

Input capture

The 8-bit input capture register is used to latch the free-running upcounter after a rising or

falling edge is detected on the LTIC pin. When an input capture occurs, the ICF bit is set and

the LTICR register contains the MSB of the free-running upcounter. An interrupt is

generated if the ICIE bit is set. The ICF bit is cleared by reading the LTICR register.

The LTICR is a read only register and always contains the data from the last input capture.

Input capture is inhibited if the ICF bit is set.

10.1.4 Low power modes

Table 33. Effect of low power modes on lite timer

Productt((ss)) 10.1.5

OObbssoolleettee PPrroodduucctt((ss)) -- OObbssoolleettee Produc Note:

Mode

Wait

Active halt

Halt

Description

No effect on lite timer

Lite timer stops counting

Interrupts

Table 34. Lite timer interrupt control/wake-up capability

Interrupt event

Event flag

Enable control bit

Exit from

wait

Exit from

halt

Timebase event

TBF

IC event

ICF

TBIE

ICIE

Yes

No

Exit from

active halt

Yes

No

The TBF and ICF interrupt events are connected to separate interrupt vectors (see

Chapter 7: Interrupts). They generate an interrupt if the enable bit is set in the LTCSR

register and the interrupt mask in the CC register is reset (RIM instruction).

Figure 31. Input capture timing diagram

125ns

(@ 8 MHz fOSC)

fCPU

fOSC

13-bit counter 0001h 0002h 0003h 0004h 0005h 0006h 0007h

LTIC pin

Cleared

by S/W

reading

LTIC register

ICF flag

LTICR register

xxh

04h

07h

t

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