TDA7503 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'TDA7503' PDF : 30 Pages View PDF
Figure 1. SAI and SSI Timings
SDI0-3
VALID
TDA7503
LRCKR
SCKR
(RCKP=0)
tsckpl
tdt
Figure 2. SAI Interrupt protocol
Left
LRCKT
VALID
tlrh
tlrs
tsdis
tsdih
tsckr
Right
Left
tsckph
Right
D02AU1357
TDE
Internal Flag set when left data written
to all enabled transmitters. If this internal
flag is set then right data must written to data
registers before the next failing edge of LRCKT.
TDE cleared when right data written
to all enabled transmitters.
LRCKR
Left
Right
Left
Right
RDR
Internal Flag set when left data read
from all enabled receivers. If this internal
flag is set then right data must read from data
registers before the next rising edge of LRCKR.
RDR cleared when right data read
from all enabled transmitters.
D02AU1372
Figure 3. SAI protocol when RLRS=0; RREL=0; RCKP=1; RDIR=0.
LRCKR
SCKR
SDI0
LEFT
RIGHT
LSB(n-1) MSB(word n) MSB-1 (n)
MSB-2 (n)
D02AU1373
13/30
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