TDA7503 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'TDA7503' PDF : 30 Pages View PDF
TDA7503
GENERAL PURPOSE I/O (GPIO) INTERFACE
Timing
Characteristics
tgod XTI Edge to GPIO Out Valid (GPIO Out Delay Time)
tgoh XTI Edge to GPIO Out Not Valid (GPIO Out Hold Time)
tgis GPIO In Valid to XTI Edge (GPIO In Set-up Time)
tgih XTI Edge to GPIO In Not Valid (GPIO In Hold Time)
Figure 10. GPIO Timing
XTI
(INPUT)
PORT1 (6:0)
(OUTPUT)
tgis
tgih
mclk = 21MHz
Unit
Min.
Max.
--
26
ns
2
--
ns
10
--
ns
6
--
ns
tgod
tgoh
PORT1 (6:0)
(INPUT)
VALID
D02AU1380
Debug Port Interface
No.
Characteristics
dclk = 42MHz
Min.
Max.
Unit
1
DBCK rise time
--
3
ns
2
DBCK fall time
--
3
ns
3
DBCK Low
40
--
ns
4
DBCK High
40
--
ns
5
DBCK Cycle Time
200
--
ns
6
DBRQN Asserted to DBOUT (ACK) Asserted
5 TDSP
--
ns
7
DBCK High to DBOUT Valid
--
42
ns
8
DBCK High to DBOUT Invalid
3
--
ns
9
DBIN Valid to DBCK Low (Set-up)
15
--
ns
10 DBCK Low to DBIN Invalid (Hold)
3
--
ns
DBOUT (ACK) Asserted to First DBCK High
2 Tc
--
ns
DBOUT (ACK) Assertion Width
4.5 TDSP - 3 5 TDSP + 7
ns
11 Last DBCK Low of Read Register to First DBCK High of Next Command 7 TDSP + 10
--
ns
12 Last DBCK Low to DBOUT Invalid (Hold)
3
--
ns
DBSEL setup to DBCK
TDSP
ns
17/30
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