TDA7503
EXTERNAL MEMORY INTERFACE (EMI) SRAM MODE
Characteristics
Address Valid and CS Assertion Pulse Width
Address Valid to RD or WR Assertion
RD or WR Assertion Pulse Width
RD or WR Negation to RD or WR Assertion
RD or WR Negation to Address not Valid
Address Valid to Input Data Valid
RD Assertion to Input Data Valid
RD Negation to Data Not Valid (Data Hold Time)
Address Valid to WR Negation
Data Setup Time to WR Negation
Data Hold Time from WR Negation
WR Assertion to Data Valid
WR Negation to Data High-Z (Note 1)
WR Assertion to Data Active
Figure 16. External Memory Interface SRAM Read Cycle
SRA_D
(7:0)
ADD (7:0)
SRA_D
(13:8)
ADD (13:8)
42MHz
Min.
Max.
89
–
23
–
45
–
39
–
5
–
–
72
–
35
0
–
73
–
32
–
5
–
–
18
–
23
5
–
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA
ALE
DRD
Figure 17. External Memory Interface SRAM Write Cycle
SRA
(7:0)
ADD (7:0)
DATA
SRA
(13:8)
ADD (13:8)
D02AU1381
ALE
DWR
20/30
D02AU1382