VIS
Preliminary
VG36128401A
VG36128801A
VG36128161A
CMOS Synchronous Dynamic RAM
AC Parameters for Read Timing (2 of 2)
Burst Length=2, CAS Latency=3
CLK
CKE
CS
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15
tCH tCL
tCKS
tCK3
tCMS
tCMH
Begin Auto
Precharge
Bank B (Bank D)
tCKH
RAS
CAS
WE
BS
A10
ADD
DQM
Hi-Z
DQ
tAH
tAS
tRRD
tRAS
tRP
tRC
tRCD
tAC3 tAC3 tHZ
tLZ
tOH tOH
QAa0 QAa1
tHZ
QBa0 QBa1
Activate
Command
Bank A
Read
Command
Bank A
Activate
Command
Bank B
(Bank D)
Read with
Precharge
Auto Precharge Command
Command
Bank A
Bank B (Bank D)
Activate
Command
Bank A
Document : 1G5-0154
Rev.1
Page 33