XRT79L71IB View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT79L71IB' PDF : 441 Pages View PDF
XRT79L71
PRELIMINARY
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
Serial clock and data interface for accessing cell/packet processor
APPLICATIONS
Digital Access and Cross Connect Systems
3G Base Stations
DSLAMs
FIGURE 1. BLOCK DIAGRAM OF THE XRT79L71
REV. P2.0.0
RTIP
RRING
AGC/
Equalizer
TU-3
PCOloHck &
P r o c eDsastoar
Recov ery
Receiver Block
Jitter
Attenuator
Rx DS3/
E3
Framer
TTIP
TRING
E3CLK
DS3CLK
ClkIN
12.288
MHz
Pulse
Shaper
Tim ing
Control
Transmitter Block
Clock
Synthesizer
Jitter
Attenuator
Tx DS3/
E3
F ram er
Microprocessor Interface
PLCP &
Overhead
HDLC
Controller
PLCP &
Overhead
HDLC
Controller
ATM Cell
Processor
or PPP
Processor
UTOPIA/
POS-PHY
Interface
ATM Cell
Processor
or PPP
Processor
2
UTOPIA/
POS-PHY
Interface
JTAG Test Port
Receive
Utopia
POS-PHY
Interface
Tran sm it
Utopia
POS-PHY
Interface
PRODUCT ORDERING INFORMATION
PRODUCT NUMBER
XRT79L71IB
PACKAGE TYPE
17X17 mm 208 Ball Shrink Thin Ball Grid Array
OPERATING TEMPERATURE RANGE
-40°C to +85°C
2
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