XRT79L71IB View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT79L71IB' PDF : 441 Pages View PDF
XRT79L71
PRELIMINARY
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
TABLE OF CONTENTS
REV. P2.0.0
GENERAL DESCRIPTION .................................................................................................1
GENERAL FEATURES:...............................................................................................................................1
Line Interface Unit ....................................................................................................................................................... 1
DS3/E3 Framer............................................................................................................................................................ 1
Receive Packet Processing ......................................................................................................................................... 1
Serial Interface ............................................................................................................................................................ 1
APPLICATIONS ...........................................................................................................................................2
FIGURE 1. BLOCK DIAGRAM OF THE XRT79L71 ............................................................................................................................... 2
PRODUCT ORDERING INFORMATION .....................................................................................................2
TABLE 1: PIN OUT OF THE XRT79L71 (TOP VIEW) ........................................................................................................................ 3
TABLE OF CONTENTS ............................................................................................................ I
1.0 BRIEF XRT79L71 ARCHITECTURE DESCRIPTION ............................................................................5
TABLE 2: LISTING OF ARCHITECTURAL/FUNCTIONAL DESCRIPTION DOCUMENTS FOR THE XRT79L71 ................................................. 5
1.1 BRIEF FUNCTIONAL ARCHITECTURE DESCRIPTION OF THE XRT79L71 - CLEAR-CHANNEL DS3/E3
FRAMER MODE ............................................................................................................................................... 5
FIGURE 2. THE FUNCTIONAL BLOCK DIAGRAM OF THE XRT79L71 WHEN IT HAS BEEN CONFIGURED TO OPERATE IN THE CLEAR-CHANNEL
DS3/E3 FRAMER MODE ................................................................................................................................................... 6
1.1.1 THE TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK ............................................................................... 7
1.1.2 THE TRANSMIT OVERHEAD DATA INPUT INTERFACE BLOCK............................................................................. 7
1.1.3 THE TRANSMIT LAPD CONTROLLER BLOCK.......................................................................................................... 7
1.1.4 THE TRANSMIT FEAC CONTROLLER BLOCK (FOR DS3, C-BIT PARITY APPLICATIONS ONLY) ...................... 7
1.1.5 THE TRANSMIT TRAIL-TRACE MESSAGE CONTROLLER BLOCK (E3, ITU-T G.832 APPLICATIONS ONLY).... 7
1.1.6 THE TRANSMIT SSM CONTROLLER BLOCK (E3, ITU-T G.832 APPLICATIONS ONLY) ....................................... 7
1.1.7 THE TRANSMIT DS3/E3 FRAMER BLOCK................................................................................................................. 7
1.1.8 THE TRANSMIT DS3/E3 LIU BLOCK .......................................................................................................................... 7
1.1.9 THE RECEIVE DS3/E3 LIU BLOCK ............................................................................................................................. 8
1.1.10 THE RECEIVE DS3/E3 FRAMER BLOCK ................................................................................................................. 8
1.1.11 THE RECEIVE SSM CONTROLLER BLOCK (E3, ITU-T G.832 APPLICATIONS ONLY) ........................................ 9
1.1.12 THE RECEIVE TRAIL-TRACE MESSAGE CONTROLLER BLOCK (E3, ITU-T G.832 APPLICATIONS ONLY)..... 9
1.1.13 THE RECEIVE FEAC CONTROLLER BLOCK (DS3 APPLICATIONS ONLY) ......................................................... 9
1.1.14 THE RECEIVE LAPD CONTROLLER BLOCK .......................................................................................................... 9
1.1.15 THE RECEIVE PAYLOAD DATA OUTPUT INTERFACE BLOCK ............................................................................ 9
1.1.16 THE RECEIVE OVERHEAD DATA OUTPUT INTERFACE BLOCK ......................................................................... 9
1.1.17 A MORE DETAILED FUNCTIONAL/ARCHITECTURAL DESCRIPTION OF THE XRT79L71 WHEN CONFIGURED TO
OPERATE IN THE CLEAR CHANNEL CONTROLLER MODE, IS IN THIS DOCUMENT
(79L71_ARCH_DESCR_CC.PDF). .................................................................................................................................. 9
1.2 BRIEF FUNCTIONAL ARCHITECTURE DESCRIPTION OF THE XRT79L71 - HIGH-SPEED HDLC CONTROL-
LER OVER DS3/E3 MODE .............................................................................................................................. 9
FIGURE 3. THE FUNCTIONAL BLOCK DIAGRAM OF THE XRT79L71 WHEN IT HAS BEEN CONFIGURED TO OPERATE IN THE HIGH-SPEED HDLC
CONTROLLER OVER DS3/E3 MODE................................................................................................................................. 10
1.2.1 THE TRANSMIT HIGH-SPEED HDLC CONTROLLER BLOCK ................................................................................ 10
1.2.2 THE TRANSMIT OVERHEAD DATA INPUT INTERFACE BLOCK (NOT SHOWN IN Figure 3).......................... 11
1.2.3 THE TRANSMIT LAPD CONTROLLER BLOCK........................................................................................................ 11
1.2.4 THE TRANSMIT FEAC CONTROLLER BLOCK (DS3 APPLICATIONS ONLY)....................................................... 11
1.2.5 THE TRANSMIT TRAIL-TRACE MESSAGE CONTROLLER BLOCK (E3, ITU-T G.832 APPLICATIONS ONLY).. 11
1.2.6 THE TRANSMIT SSM CONTROLLER BLOCK (E3, ITU-T G.832 APPLICATIONS ONLY) ..................................... 11
1.2.7 THE TRANSMIT DS3/E3 FRAMER BLOCK............................................................................................................... 11
1.2.8 THE TRANSMIT DS3/E3 LIU BLOCK ........................................................................................................................ 12
1.2.9 THE RECEIVE DS3/E3 LIU BLOCK ........................................................................................................................... 12
1.2.10 THE RECEIVE DS3/E3 FRAMER BLOCK ............................................................................................................... 12
1.2.11 THE RECEIVE TRAIL-TRACE MESSAGE CONTROLLER BLOCK (E3, ITU-T G.832 APPLICATIONS ONLY)... 13
1.2.12 THE RECEIVE SSM CONTROLLER BLOCK (E3, ITU-T G.832 APPLICATIONS ONLY) ...................................... 13
1.2.13 THE RECEIVE FEAC CONTROLLER BLOCK (DS3 APPLICATIONS ONLY) ....................................................... 13
1.2.14 THE RECEIVE LAPD CONTROLLER BLOCK ........................................................................................................ 13
1.2.15 THE RECEIVE HIGH-SPEED HDLC CONTROLLER BLOCK ................................................................................. 13
1.2.16 THE RECEIVE OVERHEAD DATA OUTPUT INTERFACE BLOCK (NOT SHOWN IN Figure 3)....................... 13
1.2.17 A MORE DETAILED FUNCTIONAL/ARCHITECTURAL DESCRIPTION OF THE XRT79L71, WHEN CONFIGURED TO
OPERATE IN THE HIGH-SPEED HDLC CONTROLLER MODE, IS IN THE DOCUMENT
(79L71_ARCH_DESCR_HDLC.PDF). ........................................................................................................................... 13
1.3 BRIEF FUNCTIONAL/ARCHITECTURAL DESCRIPTION OF THE XRT79L71 - ATM UNI OVER DS3/E3 MODE
14
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