XRT79L71
PRELIMINARY
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
REV. P2.0.0
SAMPLED "HIGH" TO THE DS3 OVERHEAD BIT THAT IS CURRENTLY BEING PROCESSED BY THE TRANSMIT OVERHEAD DATA INPUT
INTERFACE BLOCK ........................................................................................................................................................ 109
FIGURE 47. ILLUSTRATION OF THE SIGNALING THAT MUST OCCUR BETWEEN THE SYSTEM-SIDE TERMINAL EQUIPMENT AND THE TRANSMIT
OVERHEAD DATA INPUT INTERFACE OF THE XRT79L71, IN ORDER TO CONFIGURE THE XRT79L71 TO TRANSMIT THE FERF IN-
DICATOR TO THE REMOTE TERMINAL EQUIPMENT (USING METHOD 2) .............................................................................. 111
4.2.3 TRANSMIT FEAC CONTROLLER BLOCK .............................................................................................................. 112
FIGURE 48. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE TRANSMIT DIRECTION CIRCUITRY, WHENEVER THE XRT79L91
DEVICE HAS BEEN CONFIGURED TO OPERATE IN THE DS3 CLEAR-CHANNEL FRAMER MODE (WITH THE TRANSMIT FEAC CON-
TROLLER BLOCK HIGHLIGHTED)...................................................................................................................................... 113
FIGURE 49. THE BIT-FORMAT OF A FEAC MESSAGE .................................................................................................................... 113
FIGURE 50. A FLOW CHART DEPICTING HOW TO TRANSMIT A FEAC MESSAGE VIA THE FEAC TRANSMITTER ................................. 116
4.2.4 TRANSMIT LAPD CONTROLLER BLOCK .............................................................................................................. 116
FIGURE 51. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE TRANSMIT DIRECTION CIRCUITRY, WHENEVER THE XRT79L71 HAS
BEEN CONFIGURED TO OPERATE IN THE DS3 CLEAR-CHANNEL FRAMER MODE (WITH THE TRANSMIT LAPD CONTROLLER BLOCK
HIGHLIGHTED)............................................................................................................................................................... 117
FIGURE 52. LAPD MESSAGE FRAME FORMAT .............................................................................................................................. 118
TABLE 22: THE LAPD MESSAGE TYPE AND THE CORRESPONDING VALUE OF THE FIRST BYTE, WITHIN THE INFORMATION PAYLOAD FOR
STANDARD 76 OR 82 BYTE MESSAGES ........................................................................................................................... 119
4.2.4.1 TRANSMITTING STANDARD-TYPE (76 OR 82 BYTE SIZE) LAPD MESSAGES ........................................................... 119
TABLE 23: A MAPPING OF THE VALUE TO BE WRITTEN INTO INDIRECT ADDRESS LOCATION 0X11B0 AND THE CORRESPONDING PMDL MES-
SAGE............................................................................................................................................................................ 123
FIGURE 53. FLOW-CHART DEPICTING AN APPROACH THAT ONE CAN USE TO WRITING THE PAYLOAD PORTION OF THE LAPD/PMDL MES-
SAGE INTO THE TRANSMIT LAPD MESSAGE BUFFER...................................................................................................... 124
FIGURE 54. Flow Chart depicting how to use the Transmit LAPD Controller when the Transmit LAPD Controller is configured to re-
transmit the LAPD Message frames repeatedly at one-second intervals ................................................................... 126
FIGURE 55. Flow Chart depicting how to use the Transmit LAPD Controller when the Transmit LAPD Controller is configured to re-
transmit the LAPD Message frames repeatedly at one-second intervals ................................................................... 126
4.2.4.2 TRANSMITTING NON-STANDARD VARIABLE LENGTH (E.G., UP TO 82 BYTES) LAPD MESSAGES ............................ 126
FIGURE 56. FLOW-CHART DEPICTING AN APPROACH THAT ONE CAN USE TO WRITING IN THE REMAINING BYTES OF THE OUTBOUND MESSAGE
INTO THE TRANSMIT LAPD MESSAGE BUFFER............................................................................................................... 129
FIGURE 57. FLOW CHART DEPICTING HOW TO USE THE TRANSMIT LAPD CONTROLLER ................................................................. 132
4.2.4.3 Transmit LAPD Controller Block Interrupt ................................................................................................... 133
4.2.5 TRANSMIT DS3 FRAMER BLOCK .......................................................................................................................... 133
FIGURE 58. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE TRANSMIT DIRECTION CIRCUITRY, WHENEVER THE XRT79L71 HAS
BEEN CONFIGURED TO OPERATE IN THE DS3 CLEAR-CHANNEL FRAMER MODE (WITH THE TRANSMIT DS3/E3 FRAMER BLOCK
HIGHLIGHTED)............................................................................................................................................................... 134
4.2.5.1 TRANSMITTING THE LOS PATTERN ............................................................................................................ 134
4.2.5.2 TRANSMITTING THE DS3 AIS PATTERN ...................................................................................................... 136
4.2.5.3 TRANSMITTING THE DS3 IDLE PATTERN ................................................................................................... 139
4.2.5.4 TRANSMITTING THE FERF/RDI INDICATOR ................................................................................................ 140
FIGURE 59. ILLUSTRATION OF THE NEAR-END RECEIVE DS3/E3 FRAMER BLOCK DECLARING THE LOS DEFECT CONDITION ............ 143
FIGURE 60. ILLUSTRATION OF THE NEAR-END TRANSMIT DS3/E3 FRAMER BLOCK, TRANSMITTING A DS3 FRAME TO THE REMOTE TERMINAL
WITH THE X BITS SET TO "0".......................................................................................................................................... 144
FIGURE 61. ILLUSTRATION OF THE NEAR-END RECEIVE DS3/E3 FRAMER BLOCK RECEIVING A PROPER DS3 SIGNAL FROM THE REMOTE
TERMINAL EQUIPMENT (E.G., THE LOS DEFECT CONDITION IS CLEARED)........................................................................ 145
FIGURE 62. ILLUSTRATION OF THE NEAR-END TRANSMIT DS3/E3 FRAMER BLOCK, TRANSMITTING A DS3 FRAME TO THE REMOTE TERMINAL
EQUIPMENT WITH EACH OF THE X BITS SET TO "1".......................................................................................................... 146
4.2.5.5 SETTING X BITS TO "1" ................................................................................................................................. 146
4.2.5.6 TRANSMITTING THE FEBE (FAR-END BLOCK ERROR) INDICATOR ....................................................... 146
FIGURE 63. ILLUSTRATION OF THE NEAR-END RECEIVE DS3/E3 FRAMER BLOCK RECEIVING A DS3 FRAME FROM THE REMOTE TERMINAL
WITH CORRECT F, M AND CP BITS ................................................................................................................................ 147
FIGURE 64. ILLUSTRATION OF THE NEAR-END TRANSMIT DS3/E3 FRAMER BLOCK TRANSMITTING A DS3 FRAME TO THE REMOTE TERMINAL
WITH THE FEBE BITS SET TO "1, 1, 1"........................................................................................................................... 148
FIGURE 65. ILLUSTRATION OF THE NEAR-END RECEIVE DS3/E3 FRAMER BLOCK RECEIVING A DS3 FRAME FROM THE REMOTE TERMINAL
WITH AN INCORRECT CP BIT.......................................................................................................................................... 148
FIGURE 66. ILLUSTRATION OF THE NEAR-END TRANSMIT DS3/E3 FRAMER BLOCK, TRANSMITTING A DS3 FRAME TO THE REMOTE TERMINAL
WITH THE FEBE BITS SET TO "0, 1, 1"........................................................................................................................... 149
4.2.5.7 SETTING THE TRANSMIT DS3 FRAMER BLOCK TIMING REFERENCE ...................................................................... 150
4.2.6 TRANSMIT DS3/E3 LIU BLOCK - DS3 APPLICATIONS ........................................................................................ 153
FIGURE 67. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE TRANSMIT DIRECTION CIRCUITRY, WHENEVER THE XRT79L71 HAS
BEEN CONFIGURED TO OPERATE IN THE DS3 CLEAR-CHANNEL FRAMER MODE (WITH THE TRANSMIT DS3/E3 LIU BLOCK HIGH-
LIGHTED) ...................................................................................................................................................................... 153
FIGURE 68. ILLUSTRATION OF THE TRANSMIT DS3/E3 LIU BLOCK WITHIN THE XRT79L71 ............................................................ 154
4.2.6.1 THE B3ZS ENCODER BLOCK .............................................................................................................................. 155
4.2.6.2 THE JITTER ATTENUATOR BLOCK ....................................................................................................................... 155
FIGURE 69. AN ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE JITTER ATTENUATOR BLOCK ..................................... 155
V