XRT91L80 View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT91L80' PDF : 45 Pages View PDF
XRT91L80
PRELIMINARY
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
xr
REV. P1.1.0
TABLE 12: MICROPROCESSOR REGISTER 0X01H BIT DESCRIPTION
INTERRUPT STATUS CONTROL REGISTER (0X01H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved This Register Bit is Not Used
X
X
D6
Reserved This Register Bit is Not Used
X
X
D5
Reserved This Register Bit is Not Used
X
X
D4
VCXOIS Voltage Controlled External Oscillator Lock Interrupt Status
RUR
0
An external interrupt will not occur unless the VCXOIE is set to "1"
in the channel register 0x00h.
"0" = No Change
"1" = Change in VCXO Lock Status Occurred
NOTE: VCXOLKEN must be enabled for this bit to have functional
meaning.
D3
LOSIS Loss of Signal Interrupt Status
RUR
0
An external interrupt will not occur unless the RLOSIE is set to "1"
in the channel register 0x00h.
"0" = No Change
"1" = Change in LOS Status Occurred
D2
CDRIS Clock and Data Recovery Lock Interrupt Status
RUR
0
An external interrupt will not occur unless the CDRIE is set to "1" in
the channel register 0x00h.
"0" = No Change
"1" = Change in CDR Lock Status Occurred
D1
CMUIS Clock Multiplier Unit Lock Interrupt Status
RUR
0
An external interrupt will not occur unless the CMUIE is set to "1" in
the channel register 0x00h.
"0" = No Change
"1" = Change in CMU Lock Status Occurred
D0
FIFOIS FIFO Overflow Interrupt Status
RUR
0
An external interrupt will not occur unless the FIFOIE is set to "1" in
the channel register 0x00h.
"0" = No Change
"1" = Change in FIFO Overflow Status Occurred
TABLE 13: MICROPROCESSOR REGISTER 0X02H BIT DESCRIPTION
STATUS CONTROL REGISTER (0X02H)
BIT
NAME
FUNCTION
D7
Reserved This Register Bit is Not Used
D6
Reserved This Register Bit is Not Used
Register
Type
X
X
Default
Value
(HW reset)
X
X
32
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