XRT91L80 View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT91L80' PDF : 45 Pages View PDF
xr
REV. P1.1.0
PRELIMINARY
XRT91L80
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
STATUS CONTROL REGISTER (0X02H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D5
Reserved This Register Bit is Not Used
X
X
D4
VCXOD Voltage Controlled External Oscillator Lock Detection
RO
0
The VCXOD is used to indicate whether the internal clock refer-
ence is locked to an external VCO.
"0" = VCXO currently not Locked
"1" = VCXO Locked
NOTE: VCXOLKEN must be enabled for this bit to have functional
meaning.
D3
LOSD Loss of Signal Detection
The LOSD indicates the LOS activity.
"0" = No Alarm
"1" = A LOS condition is present
RO
0
D2
CDRD Clock and Data Recovery Lock Detection
The CDRD is used to indicate that the CDR is locked.
"0" = CDR Out of Lock
"1" = CDR Locked
RO
0
D1
CMUD Clock Multiplier Unit Lock Detection
The CMUD is used to indicate that the CMU is locked.
"0" = CMU Out of Lock
"1" = CMU Locked
RO
0
D0
FIFOD FIFO Overflow Detection
RO
0
The FIFOD indicates that the FIFO is experiencing an overflow
condition.
"0" = No Alarm
"1" = A FIFO Overflow condition is present
TABLE 14: MICROPROCESSOR REGISTER 0X03H BIT DESCRIPTION
CONFIGURATION 0 CONTROL REGISTER (0X03H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved Reserved - Set to 0
R/W
0
D6 ALTFREQSEL Input Reference Frequency Select
This bit is used to select the clock input reference.
"0" = 77.76/83.3 MHz
"1"= 155.52/166 MHz
R/W
1
D5
Reserved Reserved - Set to 0
R/W
0
33
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