1EDI2004AS View Datasheet(PDF) - Infineon Technologies
Part Name
Description
MFG CO.
'1EDI2004AS' PDF : 138 Pages View PDF
EiceDRIVERTM SIL
1EDI2004AS
Functional Description
2.4.6.4 Disabling the output stage
The output stage of the device can be disabled, i.e. tristated by applying a High Level at pin OSD.
The current state of the output stage is indicated by bit SSTAT.HZ. If the bit is cleared, the output stage
operates normally and issues a High or a Low level. If it is set, signals TON and TOFF are tristated.
When bit SSTAT.HZ is set, sticky bit SER.OSTER is set.
OSD Signal
The input signal OSD is used as a control signal in order to tristate the output stage of the device. A Low level
at pin OSD corresponds to the normal operation of the device. When signal OSD is at High level, the output
stage is tristated and the AMCLP signal is asserted to low.
Attention: During OSD active the DESAT function is not enabled.
Note:
DACLP pin is not affected by OSD switching.
The level read by the device at pin OSD is given by bit SSTAT2.OSDL.
The OSD function is interlocked with the passive clamping function, described in Chapter 2.4.6.5. In that way
if a voltage drop occur during OSD active, OSD will work until voltage is too small (passive clamping takes over)
and repeat working after voltage is high enough again.
2.4.6.5 Passive Clamping
When the secondary chip is not supplied, signals TOFF, TON and GATE are clamped to VEE2. See Chapter 5.5.4
for the electrical capability of this feature.
Data Sheet
44
Rev. 2.0
2019-01-16
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