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1EDI2004AS View Datasheet(PDF) - Infineon Technologies

Part Name
Description
MFG CO.
1EDI2004AS
Infineon
Infineon Technologies Infineon
'1EDI2004AS' PDF : 138 Pages View PDF
EiceDRIVERTM SIL
1EDI2004AS
Functional Description
Table 14 Failure Events Summary
Failure Event
Primary Secondary
IREF2 open
Normal
Stay in
Operation Reset
VREG shorted to Normal
Stay in
ground
Operation Reset
Memory Error on
Secondary
Noise on IREF1
Normal
Operation
Reset
Detected
hardware
fail causes
permanent
reset
Soft Reset
Noise on
IREF2/VREG
Normal
Soft Reset
Operation
Notification
(primary)
Notification
(secondary)
NFLTB activated, bit
• Signal NUV2 at Low level
PER.CER1 is set.
(if VCC2 <VUVLO2).
• Bit PSTAT.SRDY cleared. • Output Stage issues a
PWM OFF command.
OSD pin functionality
operational for: VCC2 >
VRST2.
NFLTB activated, bit
• Signal NUV2 at Low level
PER.CER1 is set.
(if VCC2 <VUVLO2).
• Bit PSTAT.SRDY cleared. • Output Stage clamped to
VEE2 .
OSD pin not functional.
NFLTB activated, bit
PER.CER1 is set.
• Output Stage issues a
PWM OFF command.
• Bit PSTAT.SRDY cleared. • OSD pin functionality
operational.
NRST/RDY Low.
• Bit SER.CER2 set (in case
NFLTB activated.
of lifesign lost).
• Frequency of OSC1 is out • Output Stage issues a
of range (may lead to SPI PWM OFF command.
communication
OSD pin functionality
problems).
operational.
NFLTB activated, bit
• Signal NUV2 at Low level
PER.CER1 is set.
(if VCC2 <VUVLO2).
• Bit PSTAT.SRDY cleared. • Output Stage issues a
PWM OFF command.
OSD pin functionality
operational for: VCC2 >
VRST2.
2.4.10 Reset Events
A reset event sets the device and its internal logic in the default configuration. All user-defined settings are
overwritten with the default values. The list of reset events and their effect is summarized in Table 15.
Note:
As already shown in Figure 11 all reset events will result in an operation mode change. The entered
mode will be OPM0.
Data Sheet
49
Rev. 2.0
2019-01-16
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