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ADE7854AACPZ View Datasheet(PDF) - Analog Devices

Part Name
Description
MFG CO.
ADE7854AACPZ
ADI
Analog Devices ADI
'ADE7854AACPZ' PDF : 96 Pages View PDF
Data Sheet
ADE7854A/ADE7858A/ADE7868A/ADE7878A
Current Waveform Gain Registers
There is a multiplier in the signal path of each phase and
neutral current. The current waveform can be changed by
±100% by writing a corresponding twos complement number
to the 24-bit signed current waveform gain registers (AIGAIN,
BIGAIN, CIGAIN, and NIGAIN). For example, writing
0x400000 to the xIGAIN registers scales up the ADC output by
50%. To scale the input by −50%, write 0xC00000 to these
registers. Equation 3 describes mathematically the function of
the current waveform gain registers.
Current Waveform =
Contentsof CurrentGainRegister
ADC Output 1
223
 (3)
Changing the content of the AIGAIN, BIGAIN, CIGAIN, or
NIGAIN register affects all calculations based on the current of
each of these registers; that is, it affects the corresponding phase
active/reactive/apparent energy and current rms calculation. In
addition, waveform samples scale accordingly.
Note that the serial ports of the ADE7854A, ADE7858A,
ADE7868A, and ADE7878A work on 32-, 16-, or 8-bit words,
and the DSP works on 28 bits. The 24-bit AIGAIN, BIGAIN,
CIGAIN, and NIGAIN registers are accessed as 32-bit registers
with the four most significant bits (MSBs) padded with 0s and
sign extended to 28 bits (see Figure 34).
31
28 27
24 23
0
0000
24-BIT NUMBER
BITS[27:24] ARE BIT 23 IS A SIGN BIT
EQUAL TO BIT 23
Figure 34. 24-Bit xIGAIN Registers Transmitted as 32-Bit Words
PGA1 BITS
GAIN[2:0]
REFERENCE
IAP ×1, ×2, ×4, ×8, ×16
DSP
HPFDIS
[23:0]
VIN
PGA1
IAN
ADC
HPF
INTEN BIT
CONFIG[0]
DIGITAL
AIGAIN[23:0]
INTEGRATOR
VIN
+0.5V/GAIN
0x5A7540 =
+5,928,256
CURRENT CHANNE L
DATA RANGE
0x5A7540 =
+5,928,256
LPF1
ZX DETECTION
0x5A7540 =
CURRENT PEAK,
+5,928,256
OVERCURRENT
DETECT
0V
CURRENT RMS (IRMS)
CALCULATION
IAWV WAVEFORM
SAMPLE REGISTER
TOTAL/FUNDAMENTAL
ACTIVE AND REACTIVE
POWER CALCULATION
0xA58AC0 =
–5,928,256
CURRENT CHANNE L
DATA RANGE AFTER
INTEGRATION
ZX SIGNAL
DATA RANGE
0V
0V
0V
–0.5V/GAIN
0xA58AC0 =
–5,928,256
ANALOG INPUT RANGE
ADC OUTPUT RANGE
0xA58AC0 =
–5,928,256
Figure 35. Phase Current Signal Path
DSP
PGA2 BITS
GAIN[5:3]
REFERENCE
INP
×1, ×2, ×4, ×8, ×16
HPFDIS
[23:0]
VIN
PGA2
INN
ADC
HPF
INTEN BIT
CONFIG[0]
DIGITAL
NIGAIN[23:0]
INTEGRATOR
CURRENT RMS (IRMS)
CALCULATION
INWV WAVEFORM
SAMPLE REGISTER
Figure 36. Neutral Current Signal Path (ADE7868A and ADE7878A Only)
Rev. C | Page 29 of 96
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