ADSP-21160M View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-21160M' PDF : 52 Pages View PDF
ADSP-21160M/ADSP-21160N
Table 33. Serial Ports—Enable and Three-State
Parameter
Switching Characteristics
tDDTEN
tDDTTE
tDDTIN
tDDTTI
Data Enable from External TCLK1
Data Disable from External TCLK1
Data Enable from Internal TCLK1
Data Disable from Internal TCLK1
1 Referenced to drive edge.
Table 34. Serial Ports—Internal Clock
Parameter
Switching Characteristics
tDFSI
tHOFSI
tDDTI
tHDTI
tSCLKIW
TFS Delay After TCLK (Internally Generated TFS)1
TFS Hold After TCLK (Internally Generated TFS)1
Transmit Data Delay After TCLK1
Transmit Data Hold After TCLK1
TCLK/RCLK Width2
1 Referenced to drive edge.
2 For ADSP-21160M, specification is 0.5tSCLK–2.5 ns (minimum) and 0.5tSCLK+2 ns (maximum)
Min
Max
Unit
4
ns
10
ns
0
ns
3
ns
Min
–1.5
0
0.5tSCLK –1.5
Max
4.5
7.5
0.5tSCLK +1.5
Unit
ns
ns
ns
ns
ns
RCLK
RFS
DT
EXTERNAL RFS WITH MCE = 1, MFD = 0
DRIVE
SAMPLE
DRIVE
tSFSE/I
tHO FSE/I
tDDTENFS
tHDTE/I
1ST BIT
tDDTLFSE
tDDTE/I
2ND BIT
TCLK
TFS
DT
LATE EXTERNAL TFS
DRIVE
SAMPLE
DRIVE
tSFSE/I
tHOFSE/I
TDDTENFS
tHDTE/I
1ST BIT
tDDTLFSE
tDDTE/I
2ND BIT
Figure 26. Serial Ports—External Late Frame Sync
Rev. C | Page 44 of 60 | February 2013
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