AT91SAM9263B-CU View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT91SAM9263B-CU' PDF : 52 Pages View PDF
Within the 80 Kbytes of SRAM available, the amount of memory assigned to each block is software programmable as a
multiple of 16 Kbytes as shown in Table 8-2. This table provides the size of the Internal SRAM C according to the size of
the internal SRAM A and the internal SRAM B.
Table 8-2. Internal SRAM Block Size
Internal SRAM C
Internal SRAM B
(DTCM) size
0
16 Kbytes
32 Kbytes
0
80 Kbytes
64 Kbytes
48 Kbytes
Internal SRAM A (ITCM) Size
16 Kbytes
32 Kbytes
64 Kbytes
48 Kbytes
48 Kbytes
32 Kbytes
32 Kbytes
16 Kbytes
Note that among the five 16 Kbyte blocks making up the Internal SRAM, one is permanently assigned to Internal SRAM
C.
At reset, the whole memory (80 Kbytes) is assigned to Internal SRAM C.
The memory blocks assigned to SRAM A, SRAM B and SRAM C areas are not contiguous and when the user
dynamically changes the Internal SRAM configuration, the new 16 Kbyte block organization may affect the previous
configuration from a software point of view.
Table 8-3 illustrates different configurations and the related 16 Kbyte blocks assignments (RB0 to RB4).
Table 8-3. 16 Kbyte Block Allocation
Configuration examples and related 16 Kbyte block assignments
Decoded
Area
Address
ITCM = 0 Kbyte
DTCM = 0 Kbyte
AHB = 80 Kbytes (1)
ITCM = 32 Kbytes
DTCM = 32
Kbytes
AHB = 16 Kbytes
ITCM = 16 Kbytes
DTCM = 32 Kbytes
AHB = 32 Kbytes
ITCM = 32 Kbytes
DTCM = 16 Kbytes
AHB = 32 Kbytes
ITCM = 16 Kbytes
DTCM = 16 Kbytes
AHB = 48 Kbytes
Internal
SRAM A
(ITCM)
0x0010 0000
0x0010 4000
RB1
RB1
RB1
RB1
RB0
RB0
Internal
SRAM B
(DTCM)
0x0020 0000
0x0020 4000
RB3
RB3
RB3
RB3
RB2
RB2
0x0030 0000
RB4
RB4
RB4
RB4
RB4
0x0030 4000
RB3
Internal
SRAM C 0x0030 8000
RB2
(AHB)
0x0030 C000
RB1
RB0
RB2
RB2
RB0
Note:
0x0031 0000
RB0
1. Configuration after reset.
When accessed from the Bus Matrix, the internal 80 Kbytes of Fast SRAM is single cycle accessible at full matrix speed
(MCK). When accessed from the processor’s TCM Interface, they are also single cycle accessible at full processor
speed.
8.1.1.2 Internal 16 Kbyte Fast SRAM
The AT91SAM9263 integrates a 16 Kbyte SRAM, mapped at address 0x0050 0000. This SRAM is single cycle
accessible at full Bus Matrix speed.
8.1.2
Boot Strategies
The system always boots at address 0x0. To ensure maximum boot possibilities, the memory layout can be changed with
two parameters.
SAM9263 [Summary] 22
6249IS–ATARM–28-Jan-13
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