AT91SAM9263B-CU View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT91SAM9263B-CU' PDF : 52 Pages View PDF
z Integrates a 16-bit programmable prescaler running on the embedded 32.768Hz oscillator
z Alarm Register capable of generating a wake-up of the system through the Shutdown Controller
9.9 General-purpose Backup Registers
z Twenty 32-bit general-purpose backup registers
9.10
Backup Power Switch
z Automatic switch of VDDBU to VDDCORE guaranteeing very low power consumption on VDDBU while
VDDCORE is present
9.11
Advanced Interrupt Controller
z Controls the interrupt lines (nIRQ and nFIQ) of the ARM Processor
z Thirty-two individually maskable and vectored interrupt sources
z Source 0 is reserved for the Fast Interrupt Input (FIQ)
z Source 1 is reserved for system peripherals (PIT, RTT, PMC, DBGU, etc.)
z Programmable Edge-triggered or Level-sensitive Internal Sources
z Programmable Positive/Negative Edge-triggered or High/Low Level-sensitive
z Four External Sources plus the Fast Interrupt signal
z 8-level Priority Controller
z Drives the Normal Interrupt of the processor
z Handles priority of the interrupt sources 1 to 31
z Higher priority interrupts can be served during service of lower priority interrupt
z Vectoring
z Optimizes Interrupt Service Routine Branch and Execution
z One 32-bit Vector Register per interrupt source
z Interrupt Vector Register reads the corresponding current Interrupt Vector
z Protect Mode
z Easy debugging by preventing automatic operations when protect models are enabled
z Fast Forcing
z Permits redirecting any normal interrupt source on the Fast Interrupt of the processor
9.12
Debug Unit
z Composed of two functions
z Two-pin UART
z Implemented features are 100% compatible with the standard Atmel USART
z Independent receiver and transmitter with a common programmable Baud Rate Generator
z Even, Odd, Mark or Space Parity Generation
z Parity, Framing and Overrun Error Detection
z Automatic Echo, Local Loopback and Remote Loopback Channel Modes
z Support for two PDC channels with connection to receiver and transmitter
z Mode for general purpose Two-wire UART serial communication
z Debug Communication Channel Support
z Offers visibility of and interrupt trigger from COMMRX and COMMTX signals from the ARM Processor’s ICE
Interface
SAM9263 [Summary] 29
6249IS–ATARM–28-Jan-13
Share Link: 
