AT91SAM9263B-CU View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT91SAM9263B-CU' PDF : 52 Pages View PDF
z the Processor Clock PCK
z the Master Clock MCK, in particular to the Matrix and the memory interfaces
z the USB Device Clock UDPCK
z the USB Host Clock UHPCK
z independent peripheral clocks, typically at the frequency of MCK
z four programmable clock outputs: PCK0 to PCK3
z Five flexible operating modes:
z Normal Mode with processor and peripherals running at a programmable frequency
z Idle Mode with processor stopped while waiting for an interrupt
z Slow Clock Mode with processor and peripherals running at low frequency
z Standby Mode, mix of Idle and Backup Mode, with peripherals running at low frequency, processor stopped
waiting for an interrupt
z Backup Mode with Main Power Supplies off, VDDBU powered by a battery
Figure 9-3. AT91SAM9263 Power Management Controller Block Diagram
Processor
Clock
Controller
SLCK
MAINCK
PLLACK
PLLBCK
Master Clock Controller
Prescaler
/1,/2,/4,...,/64
Divider
/1,/2,/4
Idle Mode
Peripherals
Clock Controller
ON/OFF
PCK
int
MCK
periph_clk[..]
Programmable Clock Controller
SLCK
MAINCK
PLLACK
PLLBCK
ON/OFF
Prescaler
/1,/2,/4,...,/64
PLLBCK
USB Clock Controller
Divider
/1,/2,/4
ON/OFF
pck[..]
UDPCK
UHPCK
9.6 Periodic Interval Timer
z Includes a 20-bit Periodic Counter, with less than 1 μs accuracy
z Includes a 12-bit Interval Overlay Counter
z Real-time OS or Linux®/WindowsCE® compliant tick generator
9.7 Watchdog Timer
z 16-bit key-protected Counter, programmable only once
z Windowed, prevents the processor deadlocking on the watchdog access
9.8 Real-time Timer
z Two Real-time Timers, allowing backup of time with different accuracies
z 32-bit Free-running back-up counter
SAM9263 [Summary] 28
6249IS–ATARM–28-Jan-13
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