9.13
Chip Identification
z Chip ID: 0x019607A0
z JTAG ID: 0x05B0C03F
z ARM926 TAP ID: 0x0792603F
9.14
PIO Controllers
z Five PIO Controllers, PIOA to PIOE, controlling a total of 160 I/O Lines
z Each PIO Controller controls up to 32 programmable I/O Lines
z PIOA has 32 I/O Lines
z PIOB has 32 I/O Lines
z PIOC has 32 I/O Lines
z PIOD has 32 I/O Lines
z PIOE has 32 I/O Lines
z Fully programmable through Set/Clear Registers
z Multiplexing of two peripheral functions per I/O Line
z For each I/O Line (whether assigned to a peripheral or used as general-purpose I/O)
z Input change interrupt
z Glitch filter
z Multi-drive option enables driving in open drain
z Programmable pull-up on each I/O line
z Pin data status register, supplies visibility of the level on the pin at any time
z Synchronous output, provides Set and Clear of several I/O lines in a single write
SAM9263 [Summary] 30
6249IS–ATARM–28-Jan-13