Figure 9-4. TrustZone Software implementation in a Trusted Execution Environment (TEE)
9.4.7.3 Debug
TrustZone hardware architecture is a security-aware debug infrastructure that can enable control over access to
secure world debug, without impairing debug visibility of the Normal world. This is controlled with bits in the Secure
Fuse Controller.
Note: Secure debug modes are described in the document “Secure Box Module (SBM)”. This document is available under
Non-Disclosure Agreement (NDA). Contact an Atmel Sales Representative for further details.
9.5 Memory Management Unit
9.5.1
About the MMU
The MMU works with the L1 and L2 memory system to translate virtual addresses to physical addresses. It also
controls accesses to and from external memory.
The ARM v7 Virtual Memory System Architecture (VMSA) features include the following:
Page table entries that support:
̶ 16 Mbyte supersections. The processor supports supersections that consist of 16 Mbyte blocks of
memory.
̶ 1 Mbyte sections
̶ 64 Kbyte large pages
̶ 4 Kbyte small pages
16 access domains
Global and application-specific identifiers to remove the requirement for context switch TLB flushes.
Extended permissions checking capability.
52 SAMA5D4 Series [DATASHEET]
Atmel-11238C-ATARM-SAMA5D4-Datasheet_12-Jul-16