CL-PS6700
Low-Power PC Card Controller
4.5 Card Interface Registers
4.5.1 Card Interface Configuration Register (0X0C002400)
Bit(s)
15:13
12
11
10
9
8
7
6
5
4
3
2
1
0
Description
Default R/W
Reserved
0
–
Card Reset.
0
R/W
0 – The PCM_RESET output is deasserted (low).
1 – The PCM_RESET output is asserted (high).
Card Reset Output Enable. If this bit is set, PCM_RESET is driven with the value of bit 12. If 0
R/W
this bit is cleared, the output is tristated.
Card Enable. This bit must be set for the CL-PS6700 to make a card access. If a card access 0
R/W
is attempted by the CL-PS7111 while this bit is cleared, a read time–out or WR_FAIL interrupt
occurs.
Card Write Protect. If this bit is set, a card is write–protected in memory and I/O
0
R/W
mode. The card Write Protect signal protects the card only in Memory mode.
Memory or I/O Mode Select.
0
R/W
0 – Card in memory mode.
1 – Card in I/O mode. Write Protect becomes IOIS16. Other Dual mode inputs are not inter-
preted by the CL-PS6700, and remain register bits that can generate interrupts.
CAUTION: This bit must be set when interfacing to the CL–PS7111 when addressing I/O
space; otherwise the system may hang.
Card Access Width. If this bit is set, the card width for memory and I/O access is 16 bits. If 0
R/W
the Auto Size bit is set, then I/O access width is determined by IOIS16_L rather than this bit.
Auto Size I/O Accesses.
0
R/W
0 – I/O access width on the PC Card bus is determined by the Card Access Width bit.
1 – Dynamic bus sizing is enabled. If IOIS16_L is asserted, the data width is 16 bits; other-
wise, it is 8 bits.
Timer Select for Memory Space Write.
0
R/W
0 – Select timer 0 (0A and 0B)
1 – Select timer 1 (1A and 1B)
Timer Select for Memory Space Read.
0
R/W
0 – Select timer 0
1 – Select timer 1
Timer Select for I/O Space Write.
0
R/W
0 – Select timer 0
1 – Select timer 1
Timer Select for I/O Space Read.
0
R/W
0 – Select timer 0
1 – Select timer 1
Timer Select for Attribute Space Write.
0
R/W
0 – Select timer 0
1 – Select timer 1
Timer Select for Attribute Space Read.
0
R/W
0 – Select timer 0
1 – Select timer 1
28
REGISTERS
CIRRUS LOGIC CONFIDENTIAL, NDA REQUIRED
PRELIMINARY DATA BOOK v1.0
November 1997