CMX850L8 View Datasheet(PDF) - CML Microsystems Plc
Part Name
Description
MFG CO.
'CMX850L8' PDF : 103 Pages View PDF
Communications Controller
CMX850
KBCON Register b5-4: Debounce period
These bits determine for how long each key press/release is debounced before being registered. A
debounce period of 3 scan cycles is normally adequate.
b5 b4
0 0 Reserved
0 1 2 scan cycles
1 0 3 scan cycles
1 1 4 scan cycles
KBCON Register b3-0: Number of column drivers
These four bits determine how many column driver pins the keyboard encoder uses. The selected
column driver pins are automatically configured as open-drain outputs when the keyboard encoder
is enabled, and revert back to their previous configuration if the keyboard encoder is disabled.
b3 b2 b1 b0
0 0 0 0 1 column driver (P4.0)
0 0 0 1 2 column drivers (P4.1-0)
0 0 1 0 3 column drivers (P4.2-0)
0 0 1 1 4 column drivers (P4.3-0)
0 1 0 0 5 column drivers (P4.4-0)
0 1 0 1 6 column drivers (P4.5-0)
0 1 1 0 7 column drivers (P4.6-0)
0 1 1 1 8 column drivers (P4.7-0)
1 0 0 0 9 column drivers (P5.0, P4.7-0)
1 0 0 1 10 column drivers (P5.1-0, P4.7-0)
1 0 1 0 11 column drivers (P5.2-0, P4.7-0)
1 0 1 1 12 column drivers (P5.3-0, P4.7-0)
1 1 0 0 13 column drivers (P5.4-0, P4.7-0)
1 1 0 1 14 column drivers (P5.5-0, P4.7-0)*
1 1 1 0 15 column drivers (P5.6-0, P4.7-0)*
1 1 1 1 16 column drivers (P5.7-0, P4.7-0)*
* Note: Port bits P5.7-5 are only available with a multiplexed memory interface (pin MUXAD = 1)
1.5.10.2
Keyboard Status Register (KBSTAT)
KBSTAT: SFR Address $ED
Bit:
7
6
5
4
3
2
1
0
Unused, always read as 0
Overflow Overflow
clear
status
Sleep
Empty
KBSTAT Register b7-4: Unused
KBSTAT Register b3: Overflow clear
Writing a 1 to this bit clears KBSTAT bit 2 (overflow status). KBSTAT bit 3 always reads back as a
0.
© 2003 CML Microsystems Plc
45
D/850/6
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