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CMX850L8 View Datasheet(PDF) - CML Microsystems Plc

Part Name
Description
MFG CO.
CMX850L8
CML
CML Microsystems Plc CML
'CMX850L8' PDF : 103 Pages View PDF
Communications Controller
CMX850
1.5.11.2
Watchdog Load Register (WDTLD)
WDTLD: SFR Address $F3
All bits are cleared to 0 on reset.
This register is used to store the most significant eight bits of the timeout counter preload value. The
timeout counter is preloaded with this value when a WDT refresh is applied. The least significant eight bits
of the timeout counter are always preloaded with $00.
Bit:
7
6
5
4
3
2
1
0
Bits 15 - 8 of timeout counter preload value
1.5.12 Real Time Clock
The Real Time Clock (RTC) is an accurate long period timer that uses the 32.768kHz reference clock within
the CMX850. The 32-bit binary rollover counter increments once per second, and is very suitable for storing
a real time and date using an appropriate software algorithm. The RTC can also generate a regular interrupt
request, the repetition rate being selectable between one sixteenth of a second and eight seconds. The RTC
has an alarm feature, which is programmed using a separate 32-bit register.
1.5.12.1
RTC Control Register (RTCCON)
RTCCON: SFR Address $FB
This register enables and controls the RTC and allows the selection of the time interval between regular
interrupts.
Bits 7 and 3 of this register are not affected by a reset. All other bits are cleared to 0 on reset.
Bit:
7
6
5
4
3
2
1
0
RTC
enable
Prescale
reset
Time
interrupt
clear
Time
interrupt
status
Clock
disable
Time interrupt interval select
RTCCON Register b7: RTC enable
This bit is used to enable the RTC. It is not affected by a reset; when the CMX850 powers up its
value is unknown and it should be set or cleared as required.
b7 = 1 Enable the RTC
b7 = 0 Disable and powersave the RTC
RTCCON Register b6: Prescale reset
The RTC has an internal “fractions of a second” clock prescaler that divides down the 32.768kHz
reference clock to provide pulses for the time interrupt request logic and a 1Hz reference signal for
the RTC. This prescaler is normally free running, but can be reset and held using this register bit to
allow the time value in the RTC to be precisely synchronised to an external time signal.
b6 = 1 Reset and hold internal clock prescaler at zero
b6 = 0 Allow the RTC clock prescaler to operate
© 2003 CML Microsystems Plc
49
D/850/6
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