MT48H8M32LFBF-8 View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48H8M32LFBF-8' PDF : 71 Pages View PDF
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
Timing Diagrams
Figure 39: READ – without Auto Precharge
T0
CLK
T1
T2
T3
tCK
tCL
tCH
tCKS tCKH
CKE
tCMS tCMH
COMMAND
ACTIVE
NOP
READ
NOP
tCMS tCMH
DQM
tAS tAH
ADDR
ROW
COLUMN m
A10
BA0, BA1
tAS tAH
ROW
tAS tAH
BANK
DISABLE AUTO PRECHARGE
BANK
DQ
tRCD
tRAS
tRC
tAC
tLZ
CL
T4
NOP
tAC
tOH
DOUT m
T5
T6
T7
NOP
PRECHARGE
NOP
tAC
tOH
DOUT m + 1
ALL BANKS
SINGLE BANK
BANK(S)
tAC
tOH
DOUT m + 2
tRP
tOH
DOUT m + 3
tHZ
T8
ACTIVE
ROW
ROW
BANK
DON’T CARE
UNDEFINED
Notes: 1. For this example, BL = 4, CL = 2, and the READ burst is followed by a manual PRECHARGE.
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
MT48H16M16LF_2.fm - Rev F 4/07 EN
58
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