MT48H8M32LFBF-8 View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48H8M32LFBF-8' PDF : 71 Pages View PDF
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
Timing Diagrams
Figure 42: Single READ – with Auto Precharge
T0
CLK
T1
tCK
tCKS tCKH
CKE
tCMS tCMH
COMMAND
ACTIVE
NOP
T2
tCL
tCH
NOP2
DQM
tAS tAH
ADDR
ROW
tAS tAH
A10
BA0, BA1
ROW
tAS tAH
BANK
DQ
tRCD
tRAS
tRC
T3
T4
T5
T6
T7
NOP2
READ
NOP
tCMS tCMH
NOP
ACTIVE
COLUMN m
ENABLE AUTO PRECHARGE
BANK
CL
ROW
ROW
tAC
tRP
tOH
DOUT m
tHZ
BANK
T8
NOP
DON’T CARE
UNDEFINED
Notes:
1. For this example, BL = 4, CL = 2, and the READ burst is followed by a manual PRECHARGE.
2. PRECHARGE command not allowed or tRAS would be violated.
See Table 11 on page 46.
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
MT48H16M16LF_2.fm - Rev F 4/07 EN
61
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