MT48H8M32LFBF-8 View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48H8M32LFBF-8' PDF : 71 Pages View PDF
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
Timing Diagrams
Figure 49: Alternating Bank Write Accesses
T0
CLK
T1
tCK
tCKS tCKH
CKE
tCMS tCMH
COMMAND
ACTIVE
NOP
DQM
ADDR
tAS tAH
ROW
T2
tCL
tCH
WRITE
tCMS tCMH
COLUMN m
T3
NOP
A10
BA0, BA1
tAS tAH
ROW
tAS tAH
BANK 0
ENABLE AUTO PRECHARGE
BANK 0
T4
T5
T6
T7
ACTIVE
NOP
WRITE
NOP
ROW
ROW
BANK 1
COLUMN b2
ENABLE AUTO PRECHARGE
BANK 1
T8
T9
NOP
ACTIVE
ROW
ROW
BANK 0
tDS tDH
tDS tDH
tDS tDH
tDS tDH
tDS tDH
tDS tDH
tDS tDH
tDS tDH
DQ
DIN m
DIN m + 1
DIN m + 2
DIN m + 3
DIN b
DIN b + 1
DIN b + 2
DIN m + 3
tRCD - bank 0
tWR - bank 0
tRP - bank 0
tRCD - bank 0
tRAS - bank 0
tRC - bank 0
tRRD
tRCD - bank 1
tWR - bank 1
DON’T CARE
Notes: 1. For this example, BL = 4.
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
MT48H16M16LF_2.fm - Rev F 4/07 EN
68
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