256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
Timing Diagrams
Figure 46: WRITE – with Auto Precharge
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
CLK
tCK
tCL
tCH
tCKS tCKH
CKE
tCMS tCMH
COMMAND
ACTIVE
NOP
WRITE
NOP
NOP
NOP
NOP
NOP
NOP
ACTIVE
DQM
tCMS tCMH
ADDR
A10
BA0, BA1
tAS tAH
ROW
tAS tAH
ROW
tAS tAH
BANK
COLUMN m
ENABLE AUTO PRECHARGE
BANK
ROW
ROW
BANK
tDS tDH
tDS tDH
tDS tDH
tDS tDH
DQ
DIN m
DIN m + 1
DIN m + 2
DIN m + 3
tRCD
tRAS
tWR2
tRP
tRC
Notes: 1. For this example, BL = 4.
DON’T CARE
UNDEFINED
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
MT48H16M16LF_2.fm - Rev F 4/07 EN
65
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