PI7C7100 View Datasheet(PDF) - Pericom Semiconductor Corporation
Part Name
Description
MFG CO.
'PI7C7100' PDF : 132 Pages View PDF
ADVANCE INFORMATION
PI7C7100
3-Port PCI Bridge 112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677
12.1 Primary Interface (continued)
P_CBE[3:0]#
1011
1100
1101
1110
1111
Command
Configuration
Write
Memory Read
Multiple
Dual Address
Cycle
Memory Read
Line
Memory Write
& Invalidate
Action
I. Type 0 configuration write: same as configuration read.
II. Type 1 configuration write(not special cycle request):
1. If the target bus is the bridge's secondary bus: claim and pass
through as a type 0 configuration write
2. If the target bus is a subordinate bus that exists behind the bridge
(but not equal to the secondary bus): claim and pass through
unchanged as a type 1 configuration write.
3. Otherwise, ignore.
III. Configuration write as special cycle request
(device = 1Fh, function = 7h):
1. If the target bus is the bridge's secondary bus: claim and pass
through as a special cycle
2. If the target bus is a subordinate bus that exists behind the bridge
(but not equal to the secondary bus): claim and pass through
unchanged as a type 1 configuration write.
3. Otherwise, ignore
Same as Memory Read
Not Supported
Same as Memory Read
Same as Memory Read
53
09/18/00 Rev 1.1
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