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SX8801IRXXMLTRT View Datasheet(PDF) - Semtech Corporation

Part Name
Description
MFG CO.
'SX8801IRXXMLTRT' PDF : 135 Pages View PDF
XE8801A – SX8801R
Sflag
-,-,-, a
a[7] := C; a[6] := C xor V; a[5] := ST full; a[4] := ST empty
Rflag reg
Rflag eaddr
C, V, Z, a
C, V, Z, a
a := reg << 1; ; a[0] := 0; C := reg[7]
a := DM(eaddr)<<1; a[0] :=0; C := DM(eaddr)[7]
Freq divn
-,-,-, -
reduces the CPU frequency (divn=nodiv, div2, div4, div8, div16)
Halt
-,-,-, -
halts the CPU
Nop
-,-,-, -
no operation
- = unchanged, u = undefined, *MSHR reg,# 1 doesn’t shift by 1
Table 3-4. Instruction short reference
The Coolrisc816 has 8 different addressing modes. These modes are described in Table 3-5. In this table, the
notation ix refers to one of the data memory index registers i0, i1, i2 or i3. Using eaddr in an instruction of Table 3-4
will access the data memory at the address DM(eaddr) and will simultaneously execute the index operation.
extended address
eaddr
addr[7:0]
(ix)
(ix, offset[7:0])
(ix,r3)
(ix)+
(ix,offset[7:0])+
-(ix)
-(ix,offset[7:0])
accessed data memory
location
DM(eaddr)
DM(h00&addr[7:0])
DM(ix)
DM(ix+offset)
DM(ix+r3)
DM(ix)
DM(ix+offset)
DM(ix-1)
DM(ix-offset)
index
operation
-
-
-
-
ix := ix+1
ix := ix+offset
ix := ix-1
ix := ix -offset
direct addressing
indexed addressing
indexed addressing with immediate offset
indexed addressing with register offset
indexed addressing with index post-increment
indexed addressing with index post-increment by the offset
indexed addressing with index pre-decrement
indexed addressing with index pre-decrement by the offset
Table 3-5. Extended address mode description
Eleven different jump conditions are implemented as shown in Table 3-6. The contents of the column CC in this
table should replace the CC notation in the instruction description of Table 3-4.
CC
condition
CS
C=1
CC
C=0
ZS
Z=1
ZC
Z=0
VS
V=1
VC
V=0
EV
(EV1 or EV0)=1
After CMP op1,op2
EQ
op1=op2
NE
op1op2
GT
op1>op2
GE
op1op2
LT
op1<op2
LE
op1op2
Table 3-6. Jump condition description
© Semtech 2005
www.semtech.com
3-6
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