XE8801A – SX8801R
code
r
w
r0
r1
c
c1
ca
s
access mode
bit can be read
bit can be written
bit always reads 0
bit always reads 1
bit is cleared by writing any value
bit is cleared by writing a 1
bit is cleared after reading
special function, verify the detailed description in the respective peripherals
Table 4-4-1. Access mode codes used in the register definitions
code
sys
cold
pconf
sleep
reset source
resetsystem
resetcold
resetpconf
resetsleep
Table 4-4-2. Reset source coding used in the register definitions
4.2.1
Low power data registers (h0000-h0007)
Name
Address
7
6
5
4
3
2
1
0
Reg00
h0000
Reg00[7:0]
rw, xxxxxxxx,-
Reg01
h0001
Reg01[7:0]
rw,xxxxxxxx,-
Reg02
h0002
Reg02[7:0]
rw,xxxxxxxx,-
Reg03
h0003
Reg03[7:0]
rw,xxxxxxxx,-
Reg04
h0004
Reg04[7:0]
rw,xxxxxxxx,-
Reg05
h0005
Reg05[7:0]
rw,xxxxxxxx,-
Reg06
h0006
Reg06[7:0]
rw,xxxxxxxx,-
Reg07
h0007
Reg07[/:0]
rw,xxxxxxxx,-
Table 4-4-3. Low power data registers
© Semtech 2005
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4-3