Preliminary Technical Data
Universal Asynchronous Receiver-Transmitter
(UART) Port—Receive and Transmit Timing
Figure 36 describes UART port receive and transmit operations.
The maximum baud rate is PCLK/16 where PCLK = 1/tPCLK.
As shown in Figure 36 there is some latency between the gener-
Table 44. UART Port
Parameter
Timing Requirement
tRXD1
Incoming Data Pulse Width
Switching Characteristic
tTXD1
Outgoing Data Pulse Width
1 UART signals RXD and TXD are routed through DPI P14-1 pins using the SRU.
ADSP-21469/ADSP-21469W
ation of internal UART interrupts and the external data
operations. These latencies are negligible at the data transmis-
sion rates for the UART.
Min
Max
Unit
TBD
TBD
ns
TBD
TBD
TBD
TBD
ns
DPI_P14-1
[RXD]
RECEIVE
INTERNAL
UART RECEIVE
INTERRUPT
DPI_P14-1
[TXD]
TRANSMIT
INTERNAL
UART TRANSMIT
INTERRUPT
START
DATA(5-8)
tRXD
DATA(5-8)
tTXD
STOP
UART RECEIVE BIT SET BY DATA STOP;
CLEARED BY FIFO READ
STOP(1-2)
UART TRANSMIT BIT SET BY PROGRAM;
CLEARED BY WRITE TO TRANSMIT
Figure 36. UART Port—Receive and Transmit Timing
Rev. PrB | Page 47 of 56 | November 2008