DM9010 View Datasheet(PDF) - Davicom Semiconductor, Inc.
Part Name
Description
MFG CO.
DM9010
Davicom Semiconductor, Inc.
'DM9010' PDF : 61 Pages View PDF
DM9010
Single Chip Ethernet Controller with General Processor Interface
7~0
GPC2
HP0,RW General Purpose Control 2
Define the input/output direction of pins SD23~16, which are used as general
purpose pins when none 32-bit mode and external MII mode, respectively.
6.33 General Purpose Register 2 ( 35H )
Bit
Name
Default
Description
7~0
GPD2
HP0,RW General Purpose Register 2 Data
When the correspondent bit of General Purpose Control Register 2 is set, the value
of the bit is reflected to pin SD23~16
When the correspondent bit of General Purpose Control Register 2 is 0, the value
of the bit to be read is reflected from correspondent pins SD23~16
6.34 General Purpose Control Register 3 ( 36H )
Bit
Name
Default
Description
7~0
GPC3
HP0,RW General Purpose Control 3
Define the input/output direction of pins SD31~24, which are used as general
purpose pins when none 32-bit mode and external MII mode, respectively.
6.35 General Purpose Register 3 ( 37H )
Bit
Name
Default
Description
7~0
GPD3
HP0,RW General Purpose Register 3 Data
When the correspondent bit of General Purpose Control Register 3 is set, the value
of the bit is reflected to pin SD31~24
When the correspondent bit of General Purpose Control Register 3 is 0, the value
of the bit to be read is reflected from correspondent pins SD31~24
6.36 Processor Bus Control Register ( 38H )
Bit
Name
Default
Description
Data Bus Current Driving/Sinking Capability
000: 2mA
001: 4mA
010: 6mA
7:5
CURR
P011,RO 011: 8mA (default)
100: 10mA
101: 12mA
110: 14mA
111: 16mA
4
Reserved P0,RW Reserved
3
GPIO
P0,RW
Enable Schmitt Trigger
1: Pin 35/36/37 (IOR/IOW/CS#) have Schmitt trigger capability.
2
Reserved P0,RW Reserved
1
IOW_SPIKE
P0,RW
Eliminate IOW spike
1: eliminate about 2ns IOW spike
0
IOR_SPIKE
P1,RW
Eliminate IOR spike
1: eliminate about 2ns IOR spike
Preliminary
26
Version: DM9010-17--DS-P04
Jan. 18, 2006
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