LRS1302 View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'LRS1302' PDF : 61 Pages View PDF
SHARP
LRS13023
14
1.5 Read Identifier Codes Operation
The read identifier codes operation outputs the
nanufacturer code, device code, block lock
:onfiguration codes for each block, and the master
ock configuration code (see Figure 3). Using the
nanufacturer and device codes, the system CPU can
u,rtomatically match the device with its proper
algorithms. The block lock and master lock
:onfiguration codes identify locked and unlocked
~1ock.sand master lock-bit setting.
FOO04
FOOO3
FOOOZ 1
FOOOl
FOOOO
Reserved for
Future Implementation
Block 15 Lock Configuration
Reserved for
Future Implementation
Code
Block 1
(Blocks 2 through 14) ’
IFFFF
looo4
I 1ooo3
Reserved for
Future Implementation
Block 1 Lock Configuration Code
OFFFF
oooo4
Reserved for
Future Implementation
oooo3 ---------M--a--s-t-e-r----L-o--c-k---C--o--n-f-ig--u-.ration Code
moo2
Block 0 Lock Configuration Code
~~~~~~~~----__-__---________________(
ooml --------_-________D_e_v--ic--e----C--o-d--e---.
Manufacturer Code Block
Figure 3. Device Identifier Code Memory Map
3.6 Write
Writing commands to the CUI enable reading of
device data and identifier codes. They also control
inspection and clearing of the status register. When
V,--=Vccl and VPP=VPPH, the CUI additionally
controls block erasure, byte write, and lock-bit
configuration.
The Block Erase command requires appropriate
command data and an address within the block to be
erased. The Byte Write command requires the
command and address of the location to be written.
Set Master and Block Lock-Bit commands require the
command and address within the device (Master
Lock) or block within the device (Block Lock) to be
locked. The Clear Block Lock-Bits co mmand requires
the command and address within the device.
The CUI does not occupy an addressable memory
location. It is written when WE and a are active. The
address and data needed to execute a command-are
latched on the rising edge of WE or CE (whichever
goes high first& Stand,ard microprocessor write
timings are used. jQures:13 and 14 illustrate WE and
m-controlled write operahons.
:
4 COMMAND D&INITlON~
When the VP, voftage I VPPLK, Read operations from
the status register, identifier codes, or blocks are
enabled. Placing VP,, on.Vpp enables successful block
erase, byte write and lock-bit configuration operations.
Device operations are selected by writing specific
commands into the CUI. Table 4 defines these
commands.
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