ADE7854AACPZ View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADE7854AACPZ' PDF : 96 Pages View PDF
ADE7854A/ADE7858A/ADE7868A/ADE7878A
Data Sheet
The ADE7878A computes the fundamental reactive power
32-, 16-, or 8-bit words and the DSP works on 28 bits. Similar to
using a proprietary algorithm that requires some initialization
the registers shown in Figure 34, the AVAROS, BVAROS,
function of the frequency of the network and its nominal voltage
CVAROS, AFVAROS, BFVAROS, and CFVAROS 24-bit signed
measured in the voltage channel. These initializations are common
registers are accessed as 32-bit registers with the four MSBs
for both fundamental active and reactive powers (see the Active
padded with 0s and sign extended to 28 bits.
Power Calculation section).
Sign of Reactive Power Calculation
Table 17 presents the settling time for the fundamental reactive
power measurement, which is the time it takes the power to
reflect the value at the input of the ADE7878A.
Note that the reactive power is a signed calculation. Table 18
summarizes the relationship between the phase difference between
the voltage and the current, and the sign of the resulting reactive
Table 17. Settling Times for Fundamental Reactive Power
power calculation.
63% Full-Scale Input Signals 100% Full-Scale Input Signals
375 ms
875 ms
Table 18. Sign of Reactive Power Calculation
Φ1 (Degrees)
Integrator Sign of Reactive Power
Reactive Power Gain Calibration
Between 0 to +180 Off
Positive
Scale the average reactive power in each phase by ±100% by writing
to one of the VAR gain 24-bit registers (AVARGAIN, BVARGAIN,
CVARGAIN, AFVARGAIN, BFVARGAIN, or CFVARGAIN) of
Between −180 to 0 Off
Between 0 to +180 On
Between −180 to 0 On
Negative
Positive
Negative
the phase. The xVARGAIN registers are placed in each phase of
the total reactive power datapath, and the xFVARGAIN registers
are placed in each phase of the fundamental reactive power
datapath. The xVARGAIN registers are twos complement signed
registers and have a resolution of 2−23/LSB. The function of the
xVARGAIN registers is expressed by
Average Reactive Power =
LPF2Output
×
1 +
xVARGAIN
223
Register
(43)
1 Φ is defined as the phase angle of the voltage signal minus the current
signal; that is, Φ is positive when the load is inductive and negative when
the load is capacitive.
The ADE7858A/ADE7868A/ADE7878A have sign detection
circuitry for reactive power calculations that monitor the total
reactive powers or the fundamental reactive powers. As described
in the Reactive Energy Calculation section, the reactive energy
accumulation executes in two stages. Every time a sign change is
detected in the energy accumulation at the end of the first stage,
that is, after the energy accumulated into the internal accumulator
The output is scaled by −50% by writing 0xC00000 to the
xVARGAIN registers and increased by +50% by writing
0x400000 to them. Use these registers to calibrate the reactive
power (or energy) gain in the device for each phase.
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE7858A/ADE7868A/ADE7878A work on
32-, 16-, or 8-bit words and the DSP works on 28 bits. Similar to
registers shown in Figure 34, the AVARGAIN, BVARGAIN,
CVARGAIN, AFVARGAIN, BFVARGAIN, and CFVARGAIN
24-bit signed registers are accessed as 32-bit registers with the
reaches the VARTHR register threshold, a dedicated interrupt is
triggered. Read the sign of each phase reactive power in the
PHSIGN register. Bit 7 (REVRPSEL) in the ACCMODE register
sets the type of reactive power to be monitored. Setting REVRPSEL
to 0 (the default value) monitors the total reactive power, whereas
setting REVRPSEL to 1 monitors the fundamental reactive power.
A sign change occurring in the power selected by Bit 7
(REVRPSEL) in the ACCMODE register sets Bits[12:10]
(REVRPC, REVRPB, and REVRPA, respectively) in the
STATUS0 register.
four MSBs padded with 0s and sign extended to 28 bits.
Bits[6:4] (CVARSIGN, BVARSIGN, and AVARSIGN, respectively)
Reactive Power Offset Calibration
The ADE7858A/ADE7868A/ADE7878A provide a reactive
power offset register on each phase and on each reactive power.
The AVAROS, BVAROS, and CVAROS registers compensate
the offsets in the total reactive power calculations, whereas the
AFVAROS, BFVAROS, and CFVAROS registers compensate
offsets in the fundamental reactive power calculations. These
signed, twos complement, 24-bit registers remove offsets in the
reactive power calculations. An offset can exist in the power
in the PHSIGN register set simultaneously with the REVRPC,
REVRPB, and REVRPA bits. They indicate the sign of the reactive
power. When these bits are set to 0, the reactive power is
positive. When these bits are set to 1, the reactive power is
negative.
Bit REVRPx of the STATUS0 register and Bit xVARSIGN in the
PHSIGN register refer to the reactive power of Phase x, the
power type selected by Bit REVRPSEL in the ACCMODE
register.
calculation due to crosstalk between channels on the PCB or in
the chip itself. The offset resolution of the registers is the same
as that of the active power offset registers (see the Active Power
Offset Calibration section).
Setting Bits[12:10] in the MASK0 register enables the REVRPC,
REVRPB, and REVRPA interrupts, respectively. When enabled,
the IRQ0 pin is set low and the status bit is set to 1 whenever a
change of sign occurs. To find the phase that triggered the
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE7858A/ADE7868A/ADE7878A work on
interrupt, read the PHSIGN register immediately after reading
the STATUS0 register. Next, write to the STATUS0 register with
Rev. C | Page 54 of 96
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