ADE7854AACPZ View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADE7854AACPZ' PDF : 96 Pages View PDF
ADE7854A/ADE7858A/ADE7868A/ADE7878A
Data Sheet
Apparent Power Calculation Using VNOM
The ADE7854A/ADE7858A/ADE7868A/ADE7878A can
compute the apparent power by multiplying the phase rms
current by an rms voltage introduced externally in the VNOM
24-bit signed register. When one of Bits[13:11] (VNOMCEN,
VNOMBEN, or VNOMAEN) in the COMPMODE register is
set to 1, the apparent power in the corresponding phase (Phase x
for VNOMxEN) is computed in this way. Clearing the VNOMxEN
bits to 0 (the default value) computes the arithmetic apparent
power.
The VNOM register contains a number determined by V, the
desired rms voltage, and VFS, the rms value of the phase voltage
when the ADC inputs are at full scale:
VNOM V 4,191,910
(51)
VFS
where V is the desired nominal phase rms voltage.
As stated in the Current Waveform Gain Registers section,
the serial ports of the ADE7854A/ADE7858A/ADE7868A/
ADE7878A work on 32-, 16-, or 8-bit words. Similar to the
register shown in Figure 37, the VNOM 24-bit signed register
is accessed as a 32-bit register with the eight MSBs padded
with 0s.
Apparent Energy Calculation
Apparent energy is defined as the integral of apparent power.
Apparent Energy = s(t) dt
(52)
Similar to active and reactive powers, the ADE7854A/ADE7858A/
ADE7868A/ADE7878A achieve the integration of the apparent
power signal in two stages (see Figure 76).
The first stage is conducted inside the DSP: every 125 μs (8 kHz
frequency), the instantaneous phase apparent power accumulates
into an internal register. When a threshold is reached, a pulse is
generated at the processor port and the threshold is subtracted
from the internal register.
The second stage is conducted outside the DSP and consists of
accumulating the pulses generated by the processor into
internal 32-bit accumulation registers. When these registers are
accessed, the contents of these registers transfer to the VA-hour
registers, xVAHR (see Figure 71 from the Active Energy
Calculation section).
The VATHR 48-bit register contains the threshold. Its value
depends on how much energy is assigned to 1 LSB of the VA-hour
registers. When a derivative of apparent energy (VAh) of
[10n VAh], where n is an integer, is desired as 1 LSB of the
xVAHR register, compute the VATHR register using the
following equation:
VATHR PMAX fs 360010n
(53)
VFS IFS
where:
PMAX = 33,516,139 = 0x1FF6A6B, the instantaneous power
computed when the ADC inputs are at full scale.
fS = 8 kHz, the frequency with which the DSP computes the
instantaneous power.
VFS, IFS are the rms values of phase voltages and currents when
the ADC inputs are at full scale.
VATHR is a 48-bit register. As previously stated in the Current
Waveform Gain Registers section, the serial ports of the
ADE7854A/ADE7858A/ADE7868A/ADE7878A work on 32-,
16-, or 8-bit words. Similar to the WTHR register as shown in
Figure 72, the VATHR register is accessed as two 32-bit registers
(VATHR1 and VATHR0), each having eight MSBs padded with 0s.
This discrete time accumulation or summation is equivalent to
integration in continuous time as shown in Equation 54.
Apparent Energy
=
s(t)dt
Lim
s(nT)
T 0 n 0
T
(54)
where:
n is the discrete time sample number.
T is the sample period.
In the ADE7854A/ADE7858A/ADE7868A/ADE7878A, the
phase apparent powers are accumulated in the AVAHR, BVAHR,
and CVAHR 32-bit signed registers. When the apparent power
is positive, the apparent energy register content can roll over
to full-scale negative (0x80000000) and continue increasing
in value.
AIRMS
AVAGAIN
AVAHR[31:0]
AVRMS
ACCUMULATOR
AVA VATHR[47:0]
24
DIGITAL SIGNAL PROCESSOR
32-BIT REGISTER
Figure 76. Apparent Power Data Flow and Apparent Energy Accumulation
Rev. C | Page 58 of 96
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