VG36128401A View Datasheet(PDF) - Vanguard International Semiconductor
Part Name
Description
MFG CO.
'VG36128401A' PDF : 69 Pages View PDF
VIS
Preliminary
5.Mode Register (Address Input for Mode Set)
VG36128401A
VG36128801A
VG36128161A
CMOS Synchronous Dynamic RAM
13 12 11 10 9 8 7 6 5 4 3 2 1 0
00 0 0 0 0 1
Reserved
13 12 11 10 9 8 7 6 5 4 3 2 1 0
x x x x 1 0 0 LTMODE WT
BL
13 12 11 10 9 8 7 6 5 4 3 2 1 0
x x x x 0 0 0 LTMODE WT
BL
JEDEC Standard Test Set
Burst Read and Single Write (for Write Through Cache)
Burst Read and Burst Write
X = Dont’ care
Burst length
Wrap type
Bits2 - 0 WT = 0 WT = 1
000
1
1
001
2
2
010
4
4
011
8
8
100
R
R
101
R
R
110
R
R
111 Full page R
0 Sequential
1 Interleave
Latency
mode
Bits6 - 4 CAS Iatency
000
R
001
R
010
2
011
3
100
R
101
R
110
R
111
R
Remark R : Reserved
Document : 1G5-0154
Rev.1
Page 14
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