VG36128401A View Datasheet(PDF) - Vanguard International Semiconductor
Part Name
Description
MFG CO.
'VG36128401A' PDF : 69 Pages View PDF
VIS
Preliminary
6 Address Bits of Bank-Select and precharge
6.1 Quad banks controlled by A12 & A13
VG36128401A
VG36128801A
VG36128161A
CMOS Synchronous Dynamic RAM
Row A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13
(Activate command)
A12 A13 Result
0
0
Select Bank A
“Activate “ command
0
1
Select Bank B
“Activate” command
1
0
Select Bank C
“Activate” command
1
1
Select Bank D
“Activate” command
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13
Row
(Precharge command)
A10 A12 A13 Result
0 0 0 Precharge Bank A
0 0 1 Precharge Bank B
0 1 0 Precharge Bank C
0 1 1 Precharge Bank D
1 X X Precharge All Banks
0 Disables Auto - Precharge (End of Burst)
1 Enables Auto - Precharge (End of Burst)
Col. A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A12 A13 Result
(CAS strobes)
0
0
Enables Read/Write
commands for Bank A
0
1
Enables Read/Write
commands for Bank B
1
0
Enables Read/Write
commands for Bank C
1
1
Enables Read/Write
commands for Bank D
Document : 1G5-0154
Rev.1
Page 16
Share Link: 
