VG36128401A View Datasheet(PDF) - Vanguard International Semiconductor
Part Name
Description
MFG CO.
'VG36128401A' PDF : 69 Pages View PDF
VIS
5.1 Burst Length and Sequence
(Burst of Two)
Starting Address
(column address A0, binary)
0
1
Preliminary
VG36128401A
VG36128801A
VG36128161A
CMOS Synchronous Dynamic RAM
Sequential Addressing
Sequence (decimal)
0, 1
1, 0
Interleave Addressing Sequence (decimal)
0, 1
1, 0
(Burst of Four)
Starting Address
(column address A1 - A0, binary)
00
01
10
11
Sequential Addressing
Sequence (decimal)
0, 1, 2, 3
1, 2, 3, 0
2, 3, 0, 1
3, 0, 1, 2
Interleave Addressing Sequence (decimal)
0, 1, 2, 3
1, 0, 3, 2
2, 3, 0, 1
3, 2, 1, 0
(Burst of Eight)
Starting Address
(column address A2 - A0, binary)
000
001
010
011
100
101
110
111
Sequential Addressing
Sequence (decimal)
0, 1, 2, 3, 4, 5, 6, 7
1, 2, 3, 4, 5, 6, 7, 0
2, 3, 4, 5, 6, 7, 0, 1
3, 4, 5, 6, 7, 0, 1 ,2
4, 5, 6, 7, 0, 1, 2, 3
5, 6 ,7, 0, 1, 2, 3, 4
6, 7 ,0 ,1 ,2 ,3 ,4 ,5
7, 0, 1, 2, 3, 4, 5, 6
Interleave Addressing Sequence (decimal)
0, 1, 2, 3, 4, 5, 6, 7
1, 0, 3, 2, 5, 4, 7, 6
2, 3, 0, 1, 6, 7, 4, 5
3, 2, 1, 0, 7, 6, 5, 4
4, 5, 6, 7, 0, 1, 2, 3
5, 4, 7, 6, 1, 0, 3, 2
6, 7, 4, 5, 2, 3, 0, 1
7, 6, 5, 4, 3, 2, 1, 0
Full page burst is an extension of the above tables of Sequential Addressing, with the length being 2048 /
1024 / 512 for 32M x 4 / 16M x 8 / 8M X16 devices, respectively.
Document : 1G5-0154
Rev.1
Page 15
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